From: SnickerSun Date: Thu, 2 May 2024 15:43:50 +0000 (+0800) Subject: add efuse patch X-Git-Tag: leiniao_debug_1.0.0_20250922_020716~436 X-Git-Url: http://git.snicker.com.cn/css/static/gitweb.css?a=commitdiff_plain;h=d0f1e562f64d353f43542d94743aff23ac574565;p=mirrors%2FFD230.git add efuse patch --- diff --git a/code/sdk/application/brandy/brandy_recovery/main.c b/code/sdk/application/brandy/brandy_recovery/main.c index c9a2b2b6a..9d77e378f 100644 --- a/code/sdk/application/brandy/brandy_recovery/main.c +++ b/code/sdk/application/brandy/brandy_recovery/main.c @@ -279,7 +279,7 @@ static void chip_init(void) cpu_trace_enable_mcpu_repeat(); - otp_init(); + // otp_init(); uapi_pm_control(PM_SDIO_POWER_UP_AND_RUN); } diff --git a/code/sdk/application/brandy/brandy_standard/chip_init.c b/code/sdk/application/brandy/brandy_standard/chip_init.c index faee95656..1ce1d2979 100644 --- a/code/sdk/application/brandy/brandy_standard/chip_init.c +++ b/code/sdk/application/brandy/brandy_standard/chip_init.c @@ -158,7 +158,7 @@ void chip_init(void) log_memory_region_init(); - otp_init(); + // otp_init(); #if ENABLE_LOW_POWER == YES copy_from_flash_to_pm_text(); #endif diff --git a/code/sdk/build/config/target_config/brandy/target_config.py b/code/sdk/build/config/target_config/brandy/target_config.py index 98a05250d..83bd831a1 100644 --- a/code/sdk/build/config/target_config/brandy/target_config.py +++ b/code/sdk/build/config/target_config/brandy/target_config.py @@ -17,7 +17,7 @@ target_template = { 'hso_enable': False, 'os': 'non-os', 'CONFIG_WATCHDOG_USING_V100': 'y', - 'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE'], + 'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_EFUSE_CLK_EN'], 'std_libs': ['c', 'm', 'clang_rt.builtins-riscv32', 'gloss'], 'defines_set': ['libsec_defines', 'chip_defines', 'version_defines'], 'ram_component_set': ['cpu_trace', 'ipc', 'mem', 'boot_common_lib', 'gpio_v100', 'ssb_libs', @@ -54,7 +54,7 @@ target_template = { "CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC', "RISCV_70", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE', "DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA', - 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC'], + 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'], 'defines_set': ['chip_defines', 'version_defines'], 'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header', 'nand_flash', 'brandy_app_standard', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors', @@ -92,7 +92,7 @@ target_template = { "CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC', "CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE', "DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA', - 'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC'], + 'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'], 'defines_set': ['chip_defines', 'version_defines'], 'ram_component': ['brandy_std_lds', 'chip_brandy', 'brandy_app_standard', 'driver_header', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'c', 'm', 'segger', 'posix', 'sec', 'freertos', @@ -131,7 +131,8 @@ target_template = { 'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_DFX_SUPPORT_SOC_LOG=0', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0', 'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0', 'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0', - 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'], + 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0', + 'CONFIG_EFUSE_CLK_EN'], 'defines_set': ['chip_defines', 'version_defines'], 'ram_component': ['brandy_recovery_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header', 'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy', @@ -170,7 +171,7 @@ target_template = { 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_SOC_LOG=0', 'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0', 'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0', 'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0', 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', - 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'], + 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0', 'CONFIG_EFUSE_CLK_EN'], 'defines_set': ['chip_defines', 'version_defines'], 'ram_component': ['brandy_recovery_lds', 'partition', 'chip_brandy', 'freertos', 'cmsis_rtos', 'xlt_mem', 'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy', @@ -210,7 +211,7 @@ target_template = { "RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_SPI_SUPPORT_LPC', "SUPPORT_GPU_JPEG", "SUPPORT_GPU_GMMU", "SUPPORT_GPU_OPENVG", 'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_SPI_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_UART_SUPPORT_DMA', - 'CONFIG_I2C_SUPPORT_LPC'], + 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'], 'defines_set': ['chip_defines', 'version_defines'], 'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'chip_brandy', 'driver_header', 'nand_flash', 'brandy_testsuite', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors', diff --git a/code/sdk/drivers/chips/brandy/config/otp_map.h b/code/sdk/drivers/chips/brandy/config/otp_map.h index fed10f8e4..6e7185af2 100644 --- a/code/sdk/drivers/chips/brandy/config/otp_map.h +++ b/code/sdk/drivers/chips/brandy/config/otp_map.h @@ -232,6 +232,12 @@ #define OTP_DSP_OVERLAY_ROLLBACK_VERSION_BIT 32 #define OTP_ATE_CRC 255 + +// reserved 256-383(128 bytes) for user +#define OTP_APP_USER_START 256 +#define OTP_APP_USER_END 383 + + /** * @} */ diff --git a/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h b/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h index 54302b46c..1df6369b0 100644 --- a/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h +++ b/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h @@ -11,6 +11,7 @@ #define EFUSE_PORTING_H #include +#include #ifdef __cplusplus #if __cplusplus @@ -172,6 +173,20 @@ uint8_t efuse_port_get_en_switch(void); * @endif */ errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length); + +/** + * @if Eng + * @brief Open or close efuse region clock gate. + * @param [in] efuse_region the efuse region index. + * @param [in] en open or close. + * @else + * @brief 打开efuse的时钟门控。 + * @param [in] efuse_region efuse 区域。 + * @param [in] en 打开或关闭时钟。 + * @endif + */ +void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en); + /** * @} */ diff --git a/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c b/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c index 299510573..68258bf1e 100644 --- a/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c +++ b/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c @@ -8,6 +8,7 @@ */ #include "hal_efuse_v100.h" #include "efuse_porting.h" +#include "chip_io.h" #define FUSE_CTL_RB_BASE 0x57028000 #define FUSE_CTL_MCU_RB_BASE 0x52082000 @@ -102,6 +103,31 @@ uint8_t efuse_port_get_en_switch(void) return get_efuse_en_switch_val(); } +// void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en) +// { + // uint32_t reg_addr[EFUSE_REGION_NUM] = { 0x57000084, 0x52000210, 0x52000210 }; + // uint32_t reg_clk_en_value[EFUSE_REGION_NUM] = { 0x7F08, 0xB, 0xD }; + // if (en) { + // writew(reg_addr[efuse_region], reg_clk_en_value[efuse_region]); + // } +// } + +void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en) +{ + unused(en); + switch(efuse_region) { + case HAL_EFUSE_REGION_1: + writew(0x52000210, 0xB); + break; + case HAL_EFUSE_REGION_2: + writew(0x52000210, 0xD); + break; + default: + break; + } +} + + errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length) { if ((length == 0) || (byte_number >= EFUSE_MAX_BYTES) || diff --git a/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c b/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c index c678363fb..47d5669da 100644 --- a/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c +++ b/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c @@ -54,6 +54,9 @@ static errcode_t hal_efuse_v100_refresh_read(hal_efuse_region_t region) if (region >= HAL_EFUSE_REGION_MAX) { return ERRCODE_INVALID_PARAM; } +#ifdef CONFIG_EFUSE_CLK_EN + efuse_port_set_clk_en(region, true); +#endif hal_efuse_ctl_set_wr_rd(region, HAL_EFUSE_READ_MODE); while (hal_efuse_ctl_get(region) != HAL_EFUSE_CLEAR_RESULT) {} return ERRCODE_SUCC; @@ -64,11 +67,17 @@ static errcode_t hal_efuse_v100_init(void) if (hal_efuse_v100_regs_init() != 0) { return ERRCODE_EFUSE_REG_ADDR_INVALID; } - if (hal_efuse_v100_refresh_read(HAL_EFUSE_REGION_1) != 0) { - return ERRCODE_FAIL; + + for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) { + if (hal_efuse_v100_refresh_read((hal_efuse_region_t)i) != 0) { + return ERRCODE_FAIL; + } } + #ifdef CONFIG_EFUSE_READ_TO_RAM - hal_efuse_v100_read_val_to_ram(HAL_EFUSE_REGION_1); + for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) { + hal_efuse_v100_read_val_to_ram((hal_efuse_region_t)i); + } #endif return ERRCODE_SUCC; } @@ -115,6 +124,11 @@ static errcode_t hal_efuse_v100_read_byte(uint32_t byte_address, uint8_t *value) return ERRCODE_INVALID_PARAM; } +#ifdef CONFIG_EFUSE_CLK_EN + hal_efuse_region_t region = hal_efuse_get_region(byte_address); + efuse_port_set_clk_en(region, true); +#endif + volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)hal_efuse_v100_get_writeread_addr(byte_address)); if ((byte_address % HAL_EFUSE_BYTES_PRE_REG) != 0) { @@ -146,6 +160,10 @@ static errcode_t hal_efuse_v100_write_byte(uint32_t byte_address, uint8_t value) hal_efuse_region_t region = hal_efuse_get_region(byte_address); uint16_t offset = hal_efuse_get_byte_offset(byte_address); +#ifdef CONFIG_EFUSE_CLK_EN + efuse_port_set_clk_en(region, true); +#endif + volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)g_efuse_region_write_address[region] + ((offset >> 1U) << HAL_EFUSE_REG_SHIFT)); diff --git a/efuse.sample.txt b/efuse.sample.txt new file mode 100644 index 000000000..505c1c709 --- /dev/null +++ b/efuse.sample.txt @@ -0,0 +1,51 @@ +uint8_t data[8] = { 1,2,3,4,5,6,7,8 }; + + uint8_t rdata[8] = {0} ; + + uapi_efuse_init(); + + uapi_efuse_read_buffer(rdata, 96, 8); + + for (int i=0;i<8;i++) + + { + + printf("+++++ %d +++++ ",rdata[i]); + + } + + memset(rdata, 0, 8) ; + + for (int i=0;i<8;i++) + + { + + printf("----- %d ----- ",rdata[i]); + + } + + uapi_efuse_read_buffer(rdata, 300, 8); + + for (int i=0;i<8;i++) + + { + + printf(" ##### %d ##### ",rdata[i]); + + } + + uapi_efuse_write_buffer(300, data, 8); + + uapi_efuse_read_buffer(rdata, 300, 8); + + for (int i=0;i<8;i++) + + { + + printf("+++++ %d +++++ ",rdata[i]); + + } + +上面是efuse的参考代码，可写范围从第256字节开始往后可以写128字节。 + +加压缩附件的压缩包，解压出的文件替换掉源代码中的同名文件，并且把sdk中的chip_init.c中的opt_init() 这一行注掉，然后就可以顺利读写efuse