-/*\r
- * Copyright (c) @CompanyNameMagicTag 2021-2022. All rights reserved.\r
- * Description: chip pmp init config file.\r
- */\r
-#include "pmp_config.h"\r
-#include "stdbool.h"\r
-#include "drv_pmp.h"\r
-#include "memory_config.h"\r
-\r
-#define L2MEM_DSP_ADDR_START 0x60100000\r
-#define L2MEM_DSP_ADDR_LEN 0x100000\r
-\r
-#define L2MEM_GPU_ADDR_START 0x60240000\r
-#define L2MEM_GPU_ADDR_LEN 0x20000\r
-\r
-#if PSRAM_DENSITY_MB == 16\r
-#define PSRAM_ADDR_START 0x6C000000\r
-#define PSRAM_ADDR_LEN 0x800000\r
-#define PSRAM_SECOND_ADDR_START 0x6C800000\r
-#define PSRAM_SECOND_ADDR_LEN 0x800000\r
-#else /* PSRAM_DENSITY_MB == 32 */\r
-#define PSRAM_ADDR_START 0x6C000000\r
-#define PSRAM_ADDR_LEN 0x1000000\r
-#define PSRAM_SECOND_ADDR_START 0x6D000000\r
-#define PSRAM_SECOND_ADDR_LEN 0x1000000\r
-#endif\r
-\r
-#define NOR_FLASH_ADDR_START FLASH_START\r
-#define NOR_FLASH_ADDR_LEN FLASH_LENGTH\r
-\r
-#define BOOTROM_PMP_LENGTH 0x10000\r
-#define ITCM_PMP_LENGTH 0x10000\r
-#define ITCM_PMP_SECOND_LENGTH 0x20000\r
-#define DTCM_PMP_LENGTH 0x80000\r
-\r
-typedef enum {\r
- BOOTROM_IDX = 0,\r
- ITCM_IDX = 1,\r
- ITCM_SECOND_IDX = 2,\r
- DTCM_IDX = 3,\r
- L2RAM_DSP_IDX = 4,\r
- L2RAM_GPU_IDX = 5,\r
-#ifdef CONFIG_PSRAM_SUPPORT\r
- PSRAM_IDX,\r
- PSRAM_SECOND_IDX,\r
-#endif\r
- NOR_FLASH_IDX,\r
- MAX_REGION_NUM\r
-} region_index_t;\r
-\r
-pmp_conf_t g_region_attr[MAX_REGION_NUM];\r
-\r
-static void pmp_init_config(void)\r
-{\r
- /* bootrom 不可读不可写不可执行 */\r
- g_region_attr[BOOTROM_IDX].idx = BOOTROM_IDX;\r
- g_region_attr[BOOTROM_IDX].addr = ROM_START;\r
- g_region_attr[BOOTROM_IDX].size = BOOTROM_PMP_LENGTH;\r
- g_region_attr[BOOTROM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
- g_region_attr[BOOTROM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_NEXECUTE;\r
- g_region_attr[BOOTROM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[BOOTROM_IDX].conf.lock = true;\r
-\r
- /* ITCM 第一段 可读可执行不可写 */\r
- g_region_attr[ITCM_IDX].idx = ITCM_IDX;\r
- g_region_attr[ITCM_IDX].addr = APP_ITCM_ORIGIN;\r
- g_region_attr[ITCM_IDX].size = ITCM_PMP_LENGTH;\r
- g_region_attr[ITCM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
- g_region_attr[ITCM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;\r
- g_region_attr[ITCM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[ITCM_IDX].conf.lock = true;\r
-\r
- /* ITCM 第二段 可读可执行不可写 */\r
- g_region_attr[ITCM_SECOND_IDX].idx = ITCM_SECOND_IDX;\r
- g_region_attr[ITCM_SECOND_IDX].addr = (APP_ITCM_ORIGIN + ITCM_PMP_LENGTH);\r
- g_region_attr[ITCM_SECOND_IDX].size = ITCM_PMP_SECOND_LENGTH;\r
- g_region_attr[ITCM_SECOND_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
- g_region_attr[ITCM_SECOND_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;\r
- g_region_attr[ITCM_SECOND_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[ITCM_SECOND_IDX].conf.lock = true;\r
-\r
- /* DTCM 可读可写不可执行 */\r
- g_region_attr[DTCM_IDX].idx = DTCM_IDX;\r
- g_region_attr[DTCM_IDX].addr = APP_DTCM_ORIGIN;\r
- g_region_attr[DTCM_IDX].size = DTCM_PMP_LENGTH;\r
- g_region_attr[DTCM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
- g_region_attr[DTCM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;\r
- g_region_attr[DTCM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[DTCM_IDX].conf.lock = true;\r
-\r
- /* DSP L2MEM 可读可执行可写 打开cache属性 */\r
- g_region_attr[L2RAM_DSP_IDX].idx = L2RAM_DSP_IDX;\r
- g_region_attr[L2RAM_DSP_IDX].addr = L2MEM_DSP_ADDR_START;\r
- g_region_attr[L2RAM_DSP_IDX].size = L2MEM_DSP_ADDR_LEN;\r
-#ifdef MEMORY_MINI\r
- g_region_attr[L2RAM_DSP_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
-#else\r
- g_region_attr[L2RAM_DSP_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;\r
-#endif\r
- g_region_attr[L2RAM_DSP_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_EXECUTE;\r
- g_region_attr[L2RAM_DSP_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[L2RAM_DSP_IDX].conf.lock = true;\r
-\r
- /* GPU L2MEM 可读可执行可写 打开cache属性 */\r
- g_region_attr[L2RAM_GPU_IDX].idx = L2RAM_GPU_IDX;\r
- g_region_attr[L2RAM_GPU_IDX].addr = L2MEM_GPU_ADDR_START;\r
- g_region_attr[L2RAM_GPU_IDX].size = L2MEM_GPU_ADDR_LEN;\r
-#ifdef MEMORY_MINI\r
- g_region_attr[L2RAM_GPU_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
-#else\r
- g_region_attr[L2RAM_GPU_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;\r
-#endif\r
- g_region_attr[L2RAM_GPU_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_EXECUTE;\r
- g_region_attr[L2RAM_GPU_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[L2RAM_GPU_IDX].conf.lock = true;\r
-\r
-#ifdef CONFIG_PSRAM_SUPPORT\r
- /* PSRAM 第一段 可读可写不可执行 打开cache属性 */\r
- g_region_attr[PSRAM_IDX].idx = PSRAM_IDX;\r
- g_region_attr[PSRAM_IDX].addr = PSRAM_ADDR_START;\r
- g_region_attr[PSRAM_IDX].size = PSRAM_ADDR_LEN;\r
- g_region_attr[PSRAM_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_NO_ALLOCATE;\r
- g_region_attr[PSRAM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;\r
- g_region_attr[PSRAM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[PSRAM_IDX].conf.lock = true;\r
-\r
- /* PSRAM 第二段 可读可写不可执行 关闭cache属性 */\r
- g_region_attr[PSRAM_SECOND_IDX].idx = PSRAM_SECOND_IDX;\r
- g_region_attr[PSRAM_SECOND_IDX].addr = PSRAM_SECOND_ADDR_START;\r
- g_region_attr[PSRAM_SECOND_IDX].size = PSRAM_SECOND_ADDR_LEN;\r
- g_region_attr[PSRAM_SECOND_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;\r
- g_region_attr[PSRAM_SECOND_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;\r
- g_region_attr[PSRAM_SECOND_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[PSRAM_SECOND_IDX].conf.lock = true;\r
-#endif\r
-\r
- /* Flash 可读不可写可执行 打开cache属性 */\r
- g_region_attr[NOR_FLASH_IDX].idx = NOR_FLASH_IDX;\r
- g_region_attr[NOR_FLASH_IDX].addr = NOR_FLASH_ADDR_START;\r
- g_region_attr[NOR_FLASH_IDX].size = NOR_FLASH_ADDR_LEN;\r
- g_region_attr[NOR_FLASH_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;\r
- g_region_attr[NOR_FLASH_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;\r
- g_region_attr[NOR_FLASH_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;\r
- g_region_attr[NOR_FLASH_IDX].conf.lock = true;\r
-}\r
-\r
-void pmp_init(void)\r
-{\r
- pmp_init_config();\r
- uapi_pmp_config(g_region_attr, MAX_REGION_NUM);\r
-}\r
+/*
+ * Copyright (c) @CompanyNameMagicTag 2021-2022. All rights reserved.
+ * Description: chip pmp init config file.
+ */
+#include "pmp_config.h"
+#include "stdbool.h"
+#include "drv_pmp.h"
+#include "memory_config.h"
+#include "product.h"
+#define L2MEM_DSP_ADDR_START 0x60100000
+#define L2MEM_DSP_ADDR_LEN 0x100000
+
+#define L2MEM_GPU_ADDR_START 0x60240000
+#define L2MEM_GPU_ADDR_LEN 0x20000
+
+#if PSRAM_DENSITY_MB == 16
+#define PSRAM_ADDR_START 0x6C000000
+#define PSRAM_ADDR_LEN 0x800000
+#define PSRAM_SECOND_ADDR_START 0x6C800000
+#define PSRAM_SECOND_ADDR_LEN 0x800000
+#else /* PSRAM_DENSITY_MB == 32 */
+#define PSRAM_ADDR_START 0x6C000000
+#define PSRAM_ADDR_LEN 0x1000000
+#define PSRAM_SECOND_ADDR_START 0x6D000000
+#define PSRAM_SECOND_ADDR_LEN 0x1000000
+#endif
+
+#define NOR_FLASH_ADDR_START FLASH_START
+#define NOR_FLASH_ADDR_LEN FLASH_LENGTH
+
+#define BOOTROM_PMP_LENGTH 0x10000
+#define ITCM_PMP_LENGTH 0x10000
+#define ITCM_PMP_SECOND_LENGTH 0x20000
+#define DTCM_PMP_LENGTH 0x80000
+
+typedef enum {
+ BOOTROM_IDX = 0,
+ ITCM_IDX = 1,
+ ITCM_SECOND_IDX = 2,
+ DTCM_IDX = 3,
+ L2RAM_DSP_IDX = 4,
+ L2RAM_GPU_IDX = 5,
+#ifdef CONFIG_PSRAM_SUPPORT
+ PSRAM_IDX,
+ PSRAM_SECOND_IDX,
+#endif
+ NOR_FLASH_IDX,
+ MAX_REGION_NUM
+} region_index_t;
+
+pmp_conf_t g_region_attr[MAX_REGION_NUM];
+
+static void pmp_init_config(void)
+{
+ /* bootrom 不可读不可写不可执行 */
+ g_region_attr[BOOTROM_IDX].idx = BOOTROM_IDX;
+ g_region_attr[BOOTROM_IDX].addr = ROM_START;
+ g_region_attr[BOOTROM_IDX].size = BOOTROM_PMP_LENGTH;
+ g_region_attr[BOOTROM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+ g_region_attr[BOOTROM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_NEXECUTE;
+ g_region_attr[BOOTROM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[BOOTROM_IDX].conf.lock = true;
+
+ /* ITCM 第一段 可读可执行不可写 */
+ g_region_attr[ITCM_IDX].idx = ITCM_IDX;
+ g_region_attr[ITCM_IDX].addr = APP_ITCM_ORIGIN;
+ g_region_attr[ITCM_IDX].size = ITCM_PMP_LENGTH;
+ g_region_attr[ITCM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+ g_region_attr[ITCM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;
+ g_region_attr[ITCM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[ITCM_IDX].conf.lock = true;
+
+ /* ITCM 第二段 可读可执行不可写 */
+ g_region_attr[ITCM_SECOND_IDX].idx = ITCM_SECOND_IDX;
+ g_region_attr[ITCM_SECOND_IDX].addr = (APP_ITCM_ORIGIN + ITCM_PMP_LENGTH);
+ g_region_attr[ITCM_SECOND_IDX].size = ITCM_PMP_SECOND_LENGTH;
+ g_region_attr[ITCM_SECOND_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+ g_region_attr[ITCM_SECOND_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;
+ g_region_attr[ITCM_SECOND_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[ITCM_SECOND_IDX].conf.lock = true;
+
+ /* DTCM 可读可写不可执行 */
+ g_region_attr[DTCM_IDX].idx = DTCM_IDX;
+ g_region_attr[DTCM_IDX].addr = APP_DTCM_ORIGIN;
+ g_region_attr[DTCM_IDX].size = DTCM_PMP_LENGTH;
+ g_region_attr[DTCM_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+ g_region_attr[DTCM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;
+ g_region_attr[DTCM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[DTCM_IDX].conf.lock = true;
+
+ /* DSP L2MEM 可读可执行可写 打开cache属性 */
+ g_region_attr[L2RAM_DSP_IDX].idx = L2RAM_DSP_IDX;
+ g_region_attr[L2RAM_DSP_IDX].addr = L2MEM_DSP_ADDR_START;
+ g_region_attr[L2RAM_DSP_IDX].size = L2MEM_DSP_ADDR_LEN;
+#ifdef MEMORY_MINI
+ g_region_attr[L2RAM_DSP_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+#else
+ g_region_attr[L2RAM_DSP_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;
+#endif
+ g_region_attr[L2RAM_DSP_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_EXECUTE;
+ g_region_attr[L2RAM_DSP_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[L2RAM_DSP_IDX].conf.lock = true;
+
+ /* GPU L2MEM 可读可执行可写 打开cache属性 */
+ g_region_attr[L2RAM_GPU_IDX].idx = L2RAM_GPU_IDX;
+ g_region_attr[L2RAM_GPU_IDX].addr = L2MEM_GPU_ADDR_START;
+ g_region_attr[L2RAM_GPU_IDX].size = L2MEM_GPU_ADDR_LEN;
+#ifdef MEMORY_MINI
+ g_region_attr[L2RAM_GPU_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+#else
+ g_region_attr[L2RAM_GPU_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;
+#endif
+ g_region_attr[L2RAM_GPU_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_EXECUTE;
+ g_region_attr[L2RAM_GPU_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[L2RAM_GPU_IDX].conf.lock = true;
+
+#ifdef CONFIG_PSRAM_SUPPORT
+ /* PSRAM 第一段 可读可写不可执行 打开cache属性 */
+ g_region_attr[PSRAM_IDX].idx = PSRAM_IDX;
+ g_region_attr[PSRAM_IDX].addr = PSRAM_ADDR_START;
+ g_region_attr[PSRAM_IDX].size = PSRAM_ADDR_LEN;
+ g_region_attr[PSRAM_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_NO_ALLOCATE;
+ g_region_attr[PSRAM_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;
+ g_region_attr[PSRAM_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[PSRAM_IDX].conf.lock = true;
+
+ /* PSRAM 第二段 可读可写不可执行 关闭cache属性 */
+ g_region_attr[PSRAM_SECOND_IDX].idx = PSRAM_SECOND_IDX;
+ g_region_attr[PSRAM_SECOND_IDX].addr = PSRAM_SECOND_ADDR_START;
+ g_region_attr[PSRAM_SECOND_IDX].size = PSRAM_SECOND_ADDR_LEN;
+ g_region_attr[PSRAM_SECOND_IDX].conf.pmp_attr = PMP_ATTR_NO_BUFFERABLE_AND_NO_CACHEABLE;
+ g_region_attr[PSRAM_SECOND_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_RW_NEXECUTE;
+ g_region_attr[PSRAM_SECOND_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[PSRAM_SECOND_IDX].conf.lock = true;
+#endif
+
+ /* Flash 可读不可写可执行 打开cache属性 */
+ g_region_attr[NOR_FLASH_IDX].idx = NOR_FLASH_IDX;
+ g_region_attr[NOR_FLASH_IDX].addr = NOR_FLASH_ADDR_START;
+ g_region_attr[NOR_FLASH_IDX].size = NOR_FLASH_ADDR_LEN;
+ g_region_attr[NOR_FLASH_IDX].conf.pmp_attr = PMP_ATTR_WRITEBACK_RWALLOCATE;
+ g_region_attr[NOR_FLASH_IDX].conf.rwx_permission = (rwx_permission_t)PMPCFG_READ_ONLY_EXECUTE;
+ g_region_attr[NOR_FLASH_IDX].conf.addr_match = PMPCFG_ADDR_MATCH_NAPOT;
+ g_region_attr[NOR_FLASH_IDX].conf.lock = true;
+}
+
+void pmp_init(void)
+{
+ pmp_init_config();
+ uapi_pmp_config(g_region_attr, MAX_REGION_NUM);
+}
projects / mirrors / FD230.git / commitdiff