'hso_enable': False,
'os': 'non-os',
'CONFIG_WATCHDOG_USING_V100': 'y',
- 'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE'],
+ 'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_EFUSE_CLK_EN'],
'std_libs': ['c', 'm', 'clang_rt.builtins-riscv32', 'gloss'],
'defines_set': ['libsec_defines', 'chip_defines', 'version_defines'],
'ram_component_set': ['cpu_trace', 'ipc', 'mem', 'boot_common_lib', 'gpio_v100', 'ssb_libs',
"CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC',
"RISCV_70", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE',
"DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA',
- 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC'],
+ 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
'defines_set': ['chip_defines', 'version_defines'],
'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header', 'nand_flash',
'brandy_app_standard', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors',
"CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC',
"CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE',
"DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA',
- 'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC'],
+ 'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
'defines_set': ['chip_defines', 'version_defines'],
'ram_component': ['brandy_std_lds', 'chip_brandy', 'brandy_app_standard', 'driver_header',
'board_brandy', 'brandy_clocks', 'pmu_brandy', 'c', 'm', 'segger', 'posix', 'sec', 'freertos',
'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_DFX_SUPPORT_SOC_LOG=0',
'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0',
'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0', 'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0',
- 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'],
+ 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0',
+ 'CONFIG_EFUSE_CLK_EN'],
'defines_set': ['chip_defines', 'version_defines'],
'ram_component': ['brandy_recovery_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header',
'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy',
'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_SOC_LOG=0',
'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0', 'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0',
'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0', 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0',
- 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'],
+ 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0', 'CONFIG_EFUSE_CLK_EN'],
'defines_set': ['chip_defines', 'version_defines'],
'ram_component': ['brandy_recovery_lds', 'partition', 'chip_brandy', 'freertos', 'cmsis_rtos', 'xlt_mem',
'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy',
"RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_SPI_SUPPORT_LPC',
"SUPPORT_GPU_JPEG", "SUPPORT_GPU_GMMU", "SUPPORT_GPU_OPENVG", 'CONFIG_PINCTRL_SUPPORT_IE',
'CONFIG_SPI_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_UART_SUPPORT_DMA',
- 'CONFIG_I2C_SUPPORT_LPC'],
+ 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
'defines_set': ['chip_defines', 'version_defines'],
'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'chip_brandy', 'driver_header', 'nand_flash',
'brandy_testsuite', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors',
if (region >= HAL_EFUSE_REGION_MAX) {
return ERRCODE_INVALID_PARAM;
}
+#ifdef CONFIG_EFUSE_CLK_EN
+ efuse_port_set_clk_en(region, true);
+#endif
hal_efuse_ctl_set_wr_rd(region, HAL_EFUSE_READ_MODE);
while (hal_efuse_ctl_get(region) != HAL_EFUSE_CLEAR_RESULT) {}
return ERRCODE_SUCC;
if (hal_efuse_v100_regs_init() != 0) {
return ERRCODE_EFUSE_REG_ADDR_INVALID;
}
- if (hal_efuse_v100_refresh_read(HAL_EFUSE_REGION_1) != 0) {
- return ERRCODE_FAIL;
+
+ for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) {
+ if (hal_efuse_v100_refresh_read((hal_efuse_region_t)i) != 0) {
+ return ERRCODE_FAIL;
+ }
}
+
#ifdef CONFIG_EFUSE_READ_TO_RAM
- hal_efuse_v100_read_val_to_ram(HAL_EFUSE_REGION_1);
+ for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) {
+ hal_efuse_v100_read_val_to_ram((hal_efuse_region_t)i);
+ }
#endif
return ERRCODE_SUCC;
}
return ERRCODE_INVALID_PARAM;
}
+#ifdef CONFIG_EFUSE_CLK_EN
+ hal_efuse_region_t region = hal_efuse_get_region(byte_address);
+ efuse_port_set_clk_en(region, true);
+#endif
+
volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)hal_efuse_v100_get_writeread_addr(byte_address));
if ((byte_address % HAL_EFUSE_BYTES_PRE_REG) != 0) {
hal_efuse_region_t region = hal_efuse_get_region(byte_address);
uint16_t offset = hal_efuse_get_byte_offset(byte_address);
+#ifdef CONFIG_EFUSE_CLK_EN
+ efuse_port_set_clk_en(region, true);
+#endif
+
volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)g_efuse_region_write_address[region] +
((offset >> 1U) << HAL_EFUSE_REG_SHIFT));