From 9d702dd12f73e6fe6f91fe97616ee44bf1c01a01 Mon Sep 17 00:00:00 2001 From: penglei <1624952103@qq.com> Date: Thu, 6 Nov 2025 17:34:59 +0800 Subject: [PATCH] =?utf8?q?=E5=A2=9E=E5=8A=A0fd272=E5=B1=8F=E9=85=8D?= =?utf8?q?=E7=BD=AE?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit --- .../acore/brandy_native_js_fd272.config | 2 +- .../acore/brandy_native_js_fd272_r.config | 18 ++++ .../acore/brandy_native_js_fd272_ssb.config | 2 +- .../acore/brandy_ssb_native_js_fd272.config | 2 +- .../drivers/drivers/driver/lcd/lcd_config.c | 98 ++++++++++++------- .../drivers/drivers/driver/lcd/lcd_private.c | 23 ++++- .../services/gpu/drv/dpu/hal/dpu_hal_crg.c | 8 +- 7 files changed, 109 insertions(+), 44 deletions(-) create mode 100644 code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_r.config diff --git a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272.config b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272.config index b4b1e2685..76919b3bc 100644 --- a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272.config +++ b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272.config @@ -14,5 +14,5 @@ # CONFIG_NORFLASH_SIZE=16 -CONFIG_PSRAM_DENSITY_MB=32 +CONFIG_PSRAM_DENSITY_MB=16 # end of Product diff --git a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_r.config b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_r.config new file mode 100644 index 000000000..76919b3bc --- /dev/null +++ b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_r.config @@ -0,0 +1,18 @@ +# Generated by Kconfig Tool. +# Note: !!!This file can not be modify manually!!! + +# +# Main menu description, show how to use this configuration system. +# + +# +# Product +# + +# +# Config the product. +# +CONFIG_NORFLASH_SIZE=16 + +CONFIG_PSRAM_DENSITY_MB=16 +# end of Product diff --git a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_ssb.config b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_ssb.config index b4b1e2685..76919b3bc 100644 --- a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_ssb.config +++ b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_native_js_fd272_ssb.config @@ -14,5 +14,5 @@ # CONFIG_NORFLASH_SIZE=16 -CONFIG_PSRAM_DENSITY_MB=32 +CONFIG_PSRAM_DENSITY_MB=16 # end of Product diff --git a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_ssb_native_js_fd272.config b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_ssb_native_js_fd272.config index b4b1e2685..76919b3bc 100644 --- a/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_ssb_native_js_fd272.config +++ b/code/sdk/build/config/target_config/brandy/menuconfig/acore/brandy_ssb_native_js_fd272.config @@ -14,5 +14,5 @@ # CONFIG_NORFLASH_SIZE=16 -CONFIG_PSRAM_DENSITY_MB=32 +CONFIG_PSRAM_DENSITY_MB=16 # end of Product diff --git a/code/sdk/drivers/drivers/driver/lcd/lcd_config.c b/code/sdk/drivers/drivers/driver/lcd/lcd_config.c index 416089d5e..32dc1088d 100644 --- a/code/sdk/drivers/drivers/driver/lcd/lcd_config.c +++ b/code/sdk/drivers/drivers/driver/lcd/lcd_config.c @@ -11,7 +11,7 @@ #define LCD_EDO_502X410_SCREEN_ID 0xFFFF //CH13613 #define LCD_EDO_466X466_SCREEN_ID 0x1133 -#define LCD_FD272_466X466_SCREEN_ID 0x20 +#define LCD_FD272_466X466_SCREEN_ID 0x113 #define LCD_JD_360X360_SCREEN_ID 0x5598 #define LCD_EDO_454X454_SCREEN_ID 0xf00 #define LCD_BOE_454X454_SCREEN_ID 0x500 @@ -106,8 +106,8 @@ const combo_dev_cfg_t g_fd272_466x466_60_config = { .vact_lines = 466, // vact 454 lines .vfp_lines = 6, // vfp 10 lines }, - .phy_data_rate = 396, // 480Mbps - .pixel_clk = 16485, // 20000KHz + .phy_data_rate = 480, // 480Mbps + .pixel_clk = 20000, // 20000KHz }; @@ -126,8 +126,8 @@ const combo_dev_cfg_t g_panel_360x360_60_config = { .vact_lines = 360, // vact 454 lines .vfp_lines = 16, // vfp 10 lines }, - .phy_data_rate = 288, // 480Mbps - .pixel_clk = 12000, // 20000KHz + .phy_data_rate = 480, // 480Mbps + .pixel_clk = 20000, // 20000KHz }; const combo_dev_cfg_t g_panel_454x454_60_config = { @@ -393,13 +393,13 @@ const lcd_cmd_sequ g_fd272_466x466_screen_init_on[] = { {1, 2, {0x73,0x08}, 0}, // // === AOD setting=== -// {1, 2, {0xFE,0x40}, 0}, -// {1, 2, {0x5D,0x24}, 0}, -// {1, 2, {0x60,0x08}, 0}, -// {1, 2, {0x61,0x05}, 0}, -// {1, 2, {0x62,0xA5}, 0}, -// {1, 2, {0x0C,0xD7}, 0}, -// {1, 2, {0x0D,0xF0}, 0}, +{1, 2, {0xFE,0x40}, 0}, +{1, 2, {0x5D,0x24}, 0}, +{1, 2, {0x60,0x08}, 0}, +{1, 2, {0x61,0x05}, 0}, +{1, 2, {0x62,0xA5}, 0}, +{1, 2, {0x0C,0xD7}, 0}, +{1, 2, {0x0D,0xF0}, 0}, // === PoweMIPI_WR(0x39,0x Settings === {1, 2, {0xFE,0xE0}, 0}, @@ -647,17 +647,28 @@ const lcd_cmd_sequ g_fd272_466x466_screen_init_on[] = { {1, 2, {0x35,0x81}, 0}, // === gamma setting === -{1, 3, {0x39,0xFE,0x40}, 0}, -{1, 3, {0x39,0x33,0x10}, 0}, -{1, 3, {0x39,0x34,0xC1}, 0}, -{1, 3, {0x39,0xFE,0x50}, 0}, -{1, 3, {0x39,0xA9,0x58}, 0}, -{1, 3, {0x39,0xAA,0x58}, 0}, -{1, 3, {0x39,0xAB,0x01}, 0}, -{1, 3, {0x39,0xFE,0x60}, 0}, -{1, 3, {0x39,0xA9,0x58}, 0}, -{1, 3, {0x39,0xAA,0x48}, 0}, -{1, 3, {0x39,0xAB,0x01}, 0}, +// {1, 3, {0x39,0xFE,0x40}, 0}, +// {1, 3, {0x39,0x33,0x10}, 0}, +// {1, 3, {0x39,0x34,0xC1}, 0}, +// {1, 3, {0x39,0xFE,0x50}, 0}, +// {1, 3, {0x39,0xA9,0x58}, 0}, +// {1, 3, {0x39,0xAA,0x58}, 0}, +// {1, 3, {0x39,0xAB,0x01}, 0}, +// {1, 3, {0x39,0xFE,0x60}, 0}, +// {1, 3, {0x39,0xA9,0x58}, 0}, +// {1, 3, {0x39,0xAA,0x48}, 0}, +// {1, 3, {0x39,0xAB,0x01}, 0}, +{1, 2, {0xFE,0x40}, 0}, +{1, 2, {0x33,0x10}, 0}, +{1, 2, {0x34,0xC1}, 0}, +{1, 2, {0xFE,0x50}, 0}, +{1, 2, {0xA9,0x58}, 0}, +{1, 2, {0xAA,0x58}, 0}, +{1, 2, {0xAB,0x01}, 0}, +{1, 2, {0xFE,0x60}, 0}, +{1, 2, {0xA9,0x58}, 0}, +{1, 2, {0xAA,0x48}, 0}, +{1, 2, {0xAB,0x01}, 0}, //=== Watchedge === {1, 2, {0xFE,0x90}, 0}, @@ -788,25 +799,42 @@ const lcd_cmd_sequ g_fd272_466x466_screen_init_on[] = { {1, 2, {0x55,0xA0}, 0}, {1, 2, {0x48,0xAA}, 0}, {1, 2, {0xFE,0x90}, 0}, -{1, 2, {0x31,0x08}, 0}, - +{1, 2, {0x31,0x08}, 0}, + +//add bist code +// {1, 2, {0xFE,0x20}, 0}, +// {1, 2, {0xF4,0x5A}, 0}, +// {1, 2, {0xF5,0x59}, 0}, + +// {1, 2, {0xFE,0xD0}, 0}, +// {1, 2, {0x4D,0x7F}, 0}, +// {1, 2, {0x4E,0x80}, 0}, +// {1, 2, {0xFE,0x40}, 0}, +// {1, 2, {0x54,0xAF}, 0}, + +// {1, 2, {0xFE,0x20}, 0}, +// {1, 2, {0xF4,0x5A}, 0}, +// {1, 2, {0xF5,0x59}, 0}, +// {1, 2, {0xFE,0x40}, 0}, +// {1, 2, {0x08,0x0A}, 0}, + + +{1, 2, {0xFE,0x00}, 0}, +// {1, 2, {0x39,0x0e}, 0}, +// {1, 2, {0xC4,0x80}, 0}, +// {1, 2, {0x3A,0x77}, 0}, + //=== CMD1 setting === // MIPI_WR(0x39,0xFE,0x00); -//MIPI_WR(0x39,0xC4,0x80); //SPI setting, mipi MIPI_WR(0x39,0xemove -//MIPI_WR(0x39,0x3A,0x55); //55 MIPI_WR(0x39,0xGB565, 77 MIPI_WR(0x39,0xGB888 +// MIPI_WR(0x39,0xC4,0x80); //SPI setting, mipi MIPI_WR(0x39,0xemove +// MIPI_WR(0x39,0x3A,0x55); //55 MIPI_WR(0x39,0xGB565, 77 MIPI_WR(0x39,0xGB888 {1, 2, {0x35,0x00}, 0}, {1, 2, {0x53,0x20}, 0}, {1, 2, {0x51,0xFF}, 0}, {1, 2, {0x63,0xFF}, 0}, {1, 5, {0x2A,0x00,0x08,0x01,0xD9}, 0}, // paMIPI_WR(0x39,0xitial update {1, 5, {0x2B,0x00,0x00,0x01,0xD1}, 0}, // paMIPI_WR(0x39,0xtial update -{1, 1, {0x11}, 120}, - -{1, 2, {0xFE,0x20}, 0}, -{1, 2, {0xF4,0x5A}, 0}, -{1, 2, {0xF5,0x59}, 0}, -{1, 2, {0xFE,0x40}, 0}, -{1, 2, {0x08,0x0A}, 0}, +{1, 1, {0x11}, 120}, {1, 1, {0x29}, 0}, }; @@ -1097,7 +1125,7 @@ const lcd_drv_cfg g_lcd_driver_ops[] = { { .bus_type = BUS_DISPLAY_MIPI, .bus_cfg = &g_fd272_466x466_60_config, - .x_start = 0x6, + .x_start = 0x8, .y_start = 0, .fps = 60, .lcd_id = LCD_FD272_466X466_SCREEN_ID, diff --git a/code/sdk/drivers/drivers/driver/lcd/lcd_private.c b/code/sdk/drivers/drivers/driver/lcd/lcd_private.c index 23e8c4737..c6ebe9dd7 100644 --- a/code/sdk/drivers/drivers/driver/lcd/lcd_private.c +++ b/code/sdk/drivers/drivers/driver/lcd/lcd_private.c @@ -2,7 +2,7 @@ * @Author: penglei 1624952103@qq.com * @Date: 2025-07-29 09:33:56 * @LastEditors: penglei 1624952103@qq.com - * @LastEditTime: 2025-07-30 11:37:00 + * @LastEditTime: 2025-11-06 16:07:32 * @FilePath: /FD230/code/sdk/drivers/drivers/driver/lcd/lcd_private.c * @Description: 这是默认设置,请设置`customMade`, 打开koroFileHeader查看配置 进行设置: https://github.com/OBKoro1/koro1FileHeader/wiki/%E9%85%8D%E7%BD%AE */ @@ -22,8 +22,21 @@ #include "product.h" #include "debug_print.h" #include "pinctrl.h" + +#ifdef BOARD_FD272 +#define LCD_VDD_EN S_AGPIO_L18 +#endif + static void lcd_drv_power_on(void) { + +#ifdef BOARD_FD272 + uapi_gpio_set_dir(LCD_VDD_EN, GPIO_DIRECTION_OUTPUT); + + uapi_gpio_set_val(LCD_VDD_EN, GPIO_LEVEL_HIGH); + uapi_tcxo_delay_ms(10); /* delay 10 ms */ +#endif + #ifndef QSPI_DISPLAY uapi_gpio_set_dir(VCI_LCD_GPIO, GPIO_DIRECTION_OUTPUT); uapi_gpio_set_val(VCI_LCD_GPIO, GPIO_LEVEL_HIGH); @@ -64,6 +77,14 @@ static void lcd_drv_power_off(void) #if defined(BOARD_FD230) uapi_tcxo_delay_ms(10); /* delay 10 ms */ #endif + +#ifdef BOARD_FD272 + uapi_gpio_set_dir(LCD_VDD_EN, GPIO_DIRECTION_OUTPUT); + + uapi_gpio_set_val(LCD_VDD_EN, GPIO_LEVEL_LOW); + uapi_tcxo_delay_ms(10); /* delay 10 ms */ +#endif + int resetvalue = uapi_gpio_get_output_val(RESET_LCD_GPIO); int lcd_envalue = uapi_gpio_get_output_val(VCI_LCD_GPIO); printf("Output RESET_LCD_GPIO %d , VCI_LCD_GPIO %d\r\n",resetvalue,lcd_envalue); diff --git a/code/sdk/middleware/services/gpu/drv/dpu/hal/dpu_hal_crg.c b/code/sdk/middleware/services/gpu/drv/dpu/hal/dpu_hal_crg.c index d253f4fe2..a589fe91d 100644 --- a/code/sdk/middleware/services/gpu/drv/dpu/hal/dpu_hal_crg.c +++ b/code/sdk/middleware/services/gpu/drv/dpu/hal/dpu_hal_crg.c @@ -70,11 +70,9 @@ td_void dpu_crg_set_vedio_mclk_div_ctl(td_bool mclk_cken) #ifdef GPU_SUPPORT_VIDEO_MODE mclk_div_ctl.bits.dpu_mclk_div = 0x412600C; /* 147M * 12/147 = 12M */ #else -#ifdef LCD_JD9885 - mclk_div_ctl.bits.dpu_mclk_div = 0x412600C; /* 147M * 20/147 = 20M */ -#else - mclk_div_ctl.bits.dpu_mclk_div = 0x4126014; -#endif + + mclk_div_ctl.bits.dpu_mclk_div = 0x4126014;/* 147M * 20/147 = 20M */ + #endif mclk_div_ctl.bits.dpu_mclk_cken = mclk_cken; uapi_reg_write(CRG_VEDIO_CRG_MCLK_DIV_CTL, mclk_div_ctl.u32); -- 2.17.1