'board': 'evb',
'base_target_name': 'target_standard_brandy_application_template',
'defines': ['PRE_ASIC', 'BRANDY_PRODUCT_EVB4', 'VERSION_STANDARD', '__LITEOS__', 'CONFIG_OTA_UPDATE_SUPPORT',
- '_ALL_SOURCE', 'SUPPORT_CXX', 'I2C_SLAVE_REG_ADDR_4BYTE', 'CONFIG_PSRAM_SUPPORT',
+ '_ALL_SOURCE', 'SUPPORT_CXX', 'I2C_SLAVE_REG_ADDR_4BYTE', 'CONFIG_PSRAM_SUPPORT','CONFIG_EFUSE_READ_TO_RAM',
"-:TARGET_CHIP_BRANDY=1", "-:BRANDY_CHIP_V100=1", 'CFG_DRIVERS_NANDFLASH', 'CONFIG_ZDIAG_NV_SUPPORT',
'CONFIG_ZDIAG_AUDIO_PROC_SUPPORT', 'CONFIG_ZDIAG_AUDIO_DUMP_SUPPORT', 'CONFIG_ZDIAG_AUDIO_PROBE_SUPPORT', 'CONFIG_SEA_PHS_SUPPORT', 'CONFIG_DIAG_GPU_PROC_SUPPORT',
'SUPPORT_BLE', 'SUPPORT_BREDR', 'ENABLE_UIKIT', 'SUPPORT_GPU_JPEG', 'SUPPORT_GPU_GMMU', 'SUPPORT_GPU_OPENVG',
#define HAL_EFUSE_POWER_OFF_VAL 0x0
#define HAL_EFUSE_POWER_ON_DELAY_US 120ULL
+#define HAL_EFUSE_RECORD_NUMS 3
#ifdef CONFIG_EFUSE_READ_TO_RAM
-static int32_t *g_store_efuse_value;
+static uint8_t g_store_efuse_value[HAL_EFUSE_RECORD_NUMS][EFUSE_REGION_MAX_BYTES] = {0};
static errcode_t hal_efuse_v100_read_byte(uint32_t byte_address, uint8_t *value);
-static void hal_efuse_v100_read_val_to_ram(hal_efuse_region_t region)
+static void hal_efuse_v100_read_val_to_ram(void)
{
- uintptr_t byte_addr = g_efuse_region_read_address[region];
- for (uint32_t i = 0; i < g_efuse_region_size[region]; i++) {
- hal_efuse_v100_read_byte(byte_addr, &g_store_efuse_value[i]);
- byte_addr += i;
+ // Record efuse.
+ uintptr_t byte_addr = 0;
+ for (uint32_t i = 0; i < EFUSE_REGION_NUM; i++) {
+ for (uint32_t j = 0; j < g_efuse_region_size[i]; j++) {
+ hal_efuse_v100_read_byte(byte_addr, &g_store_efuse_value[i][j]);
+ byte_addr++;
+ }
}
}
#endif
if (hal_efuse_v100_regs_init() != 0) {
return ERRCODE_EFUSE_REG_ADDR_INVALID;
}
+
+ if (hal_efuse_v100_refresh_read(HAL_EFUSE_REGION_2) != 0) {
+ return ERRCODE_FAIL;
+ }
+
if (hal_efuse_v100_refresh_read(HAL_EFUSE_REGION_1) != 0) {
return ERRCODE_FAIL;
}
+
#ifdef CONFIG_EFUSE_READ_TO_RAM
- hal_efuse_v100_read_val_to_ram(HAL_EFUSE_REGION_1);
+ hal_efuse_v100_read_val_to_ram();
#endif
return ERRCODE_SUCC;
}
#ifndef CONFIG_EFUSE_READ_TO_RAM
hal_efuse_v100_read_byte(byte_address, value);
#else
+ hal_efuse_region_t region = hal_efuse_get_region(byte_address);
uint16_t offset = hal_efuse_get_byte_offset(byte_address);
- *value = g_store_efuse_value[offset];
+ *value = g_store_efuse_value[region][offset];
#endif
return ERRCODE_SUCC;
}
((uint16_t)value & HAL_EFUSE_REG_L_MASK);
*efuse_byte = *efuse_byte | write_value;
+
#ifdef CONFIG_EFUSE_READ_TO_RAM
- g_store_efuse_value[offset] = write_value;
+ if (byte_address % HAL_EFUSE_BYTES_PRE_REG != 0) {
+ g_store_efuse_value[region][offset] = g_store_efuse_value[region][offset] | value;
+ } else {
+ g_store_efuse_value[region][offset] = g_store_efuse_value[region][offset] | write_value;
+ }
#endif
return ERRCODE_SUCC;
}