+++ /dev/null
-#===============================================================================
-# @brief cmake file
-# Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved.
-#===============================================================================
-set(
- gmmu_api_list
- ${CMAKE_CURRENT_SOURCE_DIR}/src/soc_gmmu_api.c
-)
-set(GPU_SRC_LIST "${GPU_SRC_LIST}" "${gmmu_api_list}" CACHE INTERNAL "platform src obj list" FORCE)
\ No newline at end of file
+++ /dev/null
-/*\r
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.\r
- * Description: gmmu api release\r
- */\r
-\r
-#include "soc_gmmu_api.h"\r
-#include "soc_osal.h"\r
-#include "drv_gmmu_ioctl.h"\r
-#ifdef NO_UART_DEBUG\r
-#include "soc_diag_util.h"\r
-#include "log_oam_logger.h"\r
-#include "log_def.h"\r
-#endif\r
-\r
-/*-------------------------------------- macro define -------------------------------------*/\r
-#ifdef NO_UART_DEBUG\r
-#define gmmu_err(fmt, args...) uapi_diag_error_log(0, fmt, ##args)\r
-#else\r
-#define gmmu_err(fmt, args...) printf("[GMMU_ERROR][%s %d]"fmt"\n", __func__, __LINE__, ##args)\r
-#endif\r
-/*-------------------------------------- struct info --------------------------------------*/\r
-\r
-typedef struct {\r
- td_s32 dev_fd;\r
- drv_gmmu_mgr gmmu_mgr;\r
-} *gmmu_par_ptr, gmmu_par_struct;\r
-\r
-/*-------------------------------------- func define --------------------------------------*/\r
-\r
-static gmmu_par_struct g_gmmu_par = { 0 };\r
-\r
-/*-------------------------------------- func release -------------------------------------*/\r
-\r
-td_s32 uapi_gmmu_init(const gmmu_attr_ptr gmmu_attr)\r
-{\r
- td_s32 ret;\r
-\r
- if (gmmu_attr == NULL) {\r
- gmmu_err("input gmmu_attr is null pointer");\r
- return EXT_FAILURE;\r
- }\r
-\r
- g_gmmu_par.gmmu_mgr.mask = DRV_GMMU_MASK;\r
- g_gmmu_par.gmmu_mgr.input_bpp = gmmu_attr->bpp;\r
- g_gmmu_par.gmmu_mgr.input_width = gmmu_attr->width;\r
- g_gmmu_par.gmmu_mgr.input_height = gmmu_attr->height;\r
-\r
- g_gmmu_par.gmmu_mgr.output_size = 0;\r
- g_gmmu_par.gmmu_mgr.output_stride = 0;\r
- g_gmmu_par.gmmu_mgr.output_addr0 = 0;\r
- g_gmmu_par.gmmu_mgr.output_addr1 = 0;\r
-\r
- g_gmmu_par.dev_fd = gmmu_open(GMMU_DEV_NAME, OSAL_O_RDWR, 0);\r
- if (g_gmmu_par.dev_fd < 0) {\r
- gmmu_err("open gmmu device failure");\r
- return EXT_FAILURE;\r
- }\r
-\r
- ret = gmmu_ioctl(g_gmmu_par.dev_fd, DRV_GMMU_CMD_CONFIG, &(g_gmmu_par.gmmu_mgr));\r
- if (ret != EXT_SUCCESS) {\r
- gmmu_err("call ioctl DRV_GMMU_CMD_CONFIG failure");\r
- uapi_gmmu_deinit();\r
- return EXT_FAILURE;\r
- }\r
-\r
- return EXT_SUCCESS;\r
-}\r
-\r
-td_void uapi_gmmu_deinit(td_void)\r
-{\r
- if (g_gmmu_par.dev_fd >= 0) {\r
- gmmu_close(g_gmmu_par.dev_fd);\r
- }\r
-\r
- g_gmmu_par.dev_fd = -1;\r
- g_gmmu_par.gmmu_mgr.input_bpp = 0;\r
- g_gmmu_par.gmmu_mgr.input_width = 0;\r
- g_gmmu_par.gmmu_mgr.input_height = 0;\r
-\r
- g_gmmu_par.gmmu_mgr.output_size = 0;\r
- g_gmmu_par.gmmu_mgr.output_stride = 0;\r
- g_gmmu_par.gmmu_mgr.output_addr0 = 0;\r
- g_gmmu_par.gmmu_mgr.output_addr1 = 0;\r
-\r
- return;\r
-}\r
-\r
-td_void uapi_gmmu_alloc(gmmu_buf_ptr gmmu_buf)\r
-{\r
- if (gmmu_buf == NULL) {\r
- gmmu_err("input gmmu_buf is null pointer");\r
- return;\r
- }\r
-\r
- gmmu_buf->stride = g_gmmu_par.gmmu_mgr.output_stride;\r
- gmmu_buf->size = g_gmmu_par.gmmu_mgr.output_size;\r
-\r
- for (int i = 0; i < GMMU_BUF_CNT; i++) {\r
- gmmu_buf->buffer[i] = (i == 0) ? (g_gmmu_par.gmmu_mgr.output_addr0) : (g_gmmu_par.gmmu_mgr.output_addr1);\r
- }\r
-\r
- return;\r
-}\r
-\r
-td_void uapi_gmmu_free(gmmu_buf_ptr gmmu_buf)\r
-{\r
- if (gmmu_buf == NULL) {\r
- gmmu_err("input gmmu_buf is null pointer");\r
- return;\r
- }\r
-\r
- gmmu_buf->stride = 0;\r
- gmmu_buf->size = 0;\r
-\r
- for (int i = 0; i < GMMU_BUF_CNT; i++) {\r
- gmmu_buf->buffer[i] = 0;\r
- }\r
-\r
- return;\r
-}\r
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: vau_arc
- */
-
-#ifndef RM_BASIC_ARC_H
-#define RM_BASIC_ARC_H
-
-#include "soc_vau_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-#ifndef CIRCLE_TO_BEZIER_H_90_DEG
-#define CIRCLE_TO_BEZIER_H_90_DEG 0.551915024494f
-#endif
-
-typedef struct {
- float x;
- float y;
-} float_point;
-
-typedef struct {
- float rx;
- float ry;
- td_float cos_phi;
- td_float sin_phi;
- td_float xhalf;
- td_float yhalf;
- td_float x1p;
- td_float y1p;
- float_point r2;
- td_float x12p;
- td_float y12p;
- td_float cr;
- td_float dq;
- td_float pq;
- td_float sc;
- td_float cxp;
- td_float cyp;
- td_float cx;
- td_float cy;
- td_float theta;
- td_float delta;
-} local_arc_params;
-
-typedef struct {
- float_point en1;
- float_point en2;
- float_point edn1;
- float_point edn2;
- td_u8 split_len;
- td_u8 t_len;
- td_float alpha;
- td_float step;
- td_float alpha_t;
- td_float theta;
- td_float delta;
- float_point r;
- float_point c;
- float_point angles;
- td_float cos_phi;
- td_float sin_phi;
- td_float interval;
-} local_bezier_points;
-
-float_point *create_arc_utility(const float_point *center, float r, float start_angle, float angle_extend, int *num);
-float_point *create_arc_cmd(const float_point *start, const float_point *end, unsigned char cmd, float r, int *num);
-void destroy_arc_path(float_point *cubic);
-td_s32 vau_draw_create_arc_fit_path(const ext_vau_path *org, ext_vau_path *fit);
-td_void vau_draw_destroy_arc_fit_path(ext_vau_path *path);
-float_point *create_elliptical_arc_utility(float_point p[2], unsigned char cmd, float_point r, float phi, int *num);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* RM_BASIC_ARC_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved.
- * Description : vau math file
- */
-
-#ifndef API_RM_VAU_MATH_H
-#define API_RM_VAU_MATH_H
-
-#include <math.h>
-#include "td_base.h"
-#include "soc_vau_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-#define VAU_TRIGO_SHIFT 15
-#ifndef CIRCLE_TO_BEZIER_H_90_DEG
-#define CIRCLE_TO_BEZIER_H_90_DEG 0.551915024494f
-#endif
-
-#define HALF_M_PI (M_PI / 2)
-
-#define deg_to_rad(a) ((a) * M_PI / 180.0f)
-#define rad_to_deg(a) ((a) * 180.0f / M_PI)
-
-#define vau_matrix_x(m, x, y) ((x) * (m)[0][0] + (y) * (m)[0][1] + (m)[0][2])
-#define vau_matrix_y(m, x, y) ((x) * (m)[1][0] + (y) * (m)[1][1] + (m)[1][2])
-
-static inline td_bool double_is_equal(double a, double b)
-{
- return fabs(a - b) <= 1e-6;
-}
-
-typedef struct {
- float x;
- float y;
-} vau_point_float, vau_vector;
-
-td_float vau_math_fabs(td_float x);
-td_float vau_math_fsqrt(td_float x);
-td_float vau_math_inv_fsqrt(td_float x);
-td_s32 vau_math_min(td_s32 a, td_s32 b);
-td_float vau_math_min_f(td_float a, td_float b);
-td_s32 vau_math_max(td_s32 a, td_s32 b);
-td_float vau_math_max_f(td_float a, td_float b);
-td_float vau_math_clamp(td_float value, td_float min_value, td_float max_value);
-td_bool vau_math_float_is_equal(td_float a, td_float b);
-td_bool vau_math_float_is_zero(td_float x);
-td_void vau_matrix_identity(ext_vau_matrix *m);
-td_void vau_matrix_mult(ext_vau_matrix *m, const ext_vau_matrix *m2);
-td_void vau_matrix_trans(ext_vau_matrix *m, float tx, float ty);
-td_void vau_matrix_scale(ext_vau_matrix *m, float sx, float sy);
-td_void vau_matrix_shear(ext_vau_matrix *m, float shx, float shy);
-td_void vau_matrix_rotate(ext_vau_matrix *m, float angle);
-td_void vau_matrix_reflect_x(ext_vau_matrix *m);
-td_void vau_matrix_reflect_y(ext_vau_matrix *m);
-td_void vau_matrix_reflect_o(ext_vau_matrix *m);
-td_s32 vector_dot_product_sign(const vau_vector *v1, const vau_vector *v2);
-td_float fast_inv_sqrt(td_float x);
-bool float_is_nan(float a);
-float vau_circle_to_bezier_h(float rad);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-#endif /* API_RM_VAU_MATH_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: render path basic
- */
-
-#ifndef VAU_SPLIT_BEZIER_H
-#define VAU_SPLIT_BEZIER_H
-
-#include "vau_stroke_dash.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-td_u32 cubic_split_agg(const vau_point_float *cubic, vau_point_float *line_points, td_u32 point_num);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* VAU_SPLIT_BEZIER_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: render path basic
- */
-
-#ifndef VAU_STROKE_DASH_H
-#define VAU_STROKE_DASH_H
-
-#include "soc_vau_type.h"
-#include "vau_math.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-#define VAU_CUBIC_BEZIER_POINT_NUM 4
-
-typedef struct {
- float x;
- float y;
-} vau_path_line_to;
-
-typedef struct {
- float x0; /* ctrl point */
- float y0; /* ctrl point */
- float x1; /* end point */
- float y1; /* end point */
-} vau_path_quad_to;
-
-typedef struct {
- float x0; /* ctrl point */
- float y0; /* ctrl point */
- float x1; /* ctrl point */
- float y1; /* ctrl point */
- float x2; /* end point */
- float y2; /* end point */
-} vau_path_cubic_to;
-
-typedef struct {
- vau_point_float s;
- vau_point_float p;
- vau_point_float o;
- td_uchar cmd;
- td_u32 offset;
- td_u32 data_num;
- vau_path_line_to line_to;
- vau_path_quad_to quad_to;
- vau_path_cubic_to cubic_to;
- vau_point_float cubic[VAU_CUBIC_BEZIER_POINT_NUM];
- td_bool rel;
-} local_stroke_dash_path;
-
-td_s32 vau_create_stroke_dash_path(const ext_vau_path *path, const ext_vau_stroke_attr *stroke,
- ext_vau_path *dash_path);
-td_void vau_destroy_stroke_dash_path(ext_vau_path *dash_path);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* VAU_STROKE_DASH_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: stroke path
- */
-
-#ifndef STROKE_INC_VAU_STROKE_PATH_H
-#define STROKE_INC_VAU_STROKE_PATH_H
-
-#include "soc_vau_type.h"
-#include "vau_stroke_dash.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-typedef enum {
- EXT_BEZIER_MODE_LINE_AVG,
- EXT_BEZIER_MODE_BEZIER_4,
- EXT_BEZIER_MODE_BEZIER_CLOSE,
- EXT_BEZIER_MODE_BEZIER_MONO,
- EXT_BEZIER_MODE_BEZIER_ELIA,
- EXT_BEZIER_MODE_BEZIER_ELIA_4,
- EXT_BEZIER_MODE_BEZIER_ELIA_CLOSE,
- EXT_BEZIER_MODE_LINE_FREETYPE,
- EXT_BEZIER_MODE_LINE_AGG,
- EXT_BEZIER_MODE_MAX
-} ext_vau_bezier_stroke_split_mode;
-
-typedef struct {
- vau_vector v;
- vau_point_float c1;
- vau_point_float c2;
- vau_point_float p4;
- float h;
- float p1p3;
- float p1p4;
- float p3p4;
- float sin;
- float cos;
-} local_stroke_add_round;
-
-typedef struct {
- td_s32 x1;
- td_s32 y1;
- td_s32 x2;
- td_s32 y2;
-} ext_vau_line_fixed;
-
-typedef struct {
- td_u32 i;
- float sx;
- float sy;
- float px;
- float py;
- float ox;
- float oy;
- td_uchar cmd;
- td_u32 offset;
- td_u32 data_num;
- vau_path_line_to line_to;
- vau_path_quad_to quad_to;
- vau_path_cubic_to cubic_to;
- ext_vau_line_fixed line_inner;
- ext_vau_line_fixed line_outer;
- td_u32 cubic_split_count;
- vau_point_float p0;
- vau_point_float p1;
- vau_point_float left;
- vau_point_float right;
- td_bool rel;
- float width;
- float half_width;
- td_bool has_close;
- td_u32 sub_index;
- int l_count;
- int c_count;
- td_bool add_join;
- td_bool add_cap;
- td_s32 ret;
- float rx;
- float ry;
- td_u32 point_num;
- td_u32 cubic_split_count_out;
-} local_parse_stroke_path;
-
-typedef struct {
- float miter_limit;
- float half_width;
-} vau_line_cap_param;
-
-typedef struct {
- td_bool add_join;
- td_bool add_cap;
-} vau_join_cap_flag;
-
-td_s32 vau_create_stroke_to_fill_path(const ext_vau_path *path, const ext_vau_stroke_attr *stroke_attr,
- ext_vau_path *fill_path, ext_vau_fill_attr *fill_attr, ext_vau_bezier_stroke_split_mode mode);
-td_void vau_destroy_stroke_to_fill_path(ext_vau_path *fill_path);
-td_u32 cubic_bezier_subdivision(const vau_point_float *points, vau_point_float *points_subdivision);
-td_void split_cubic_to_line_average(const vau_point_float *cubic, vau_point_float *line_points, td_u32 point_num);
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* STROKE_INC_VAU_STROKE_PATH_H */
+++ /dev/null
-#===============================================================================
-# @brief cmake file
-# Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved.
-#===============================================================================
-set(
- gmmu_drv_list
- ${CMAKE_CURRENT_SOURCE_DIR}/clock/gmmu_clock.c
- ${CMAKE_CURRENT_SOURCE_DIR}/context/gmmu_context.c
- ${CMAKE_CURRENT_SOURCE_DIR}/dev/gmmu_dev.c
- ${CMAKE_CURRENT_SOURCE_DIR}/dfx/gmmu_dfx.c
- ${CMAKE_CURRENT_SOURCE_DIR}/hal/gmmu_hal.c
- ${CMAKE_CURRENT_SOURCE_DIR}/intf/drv_gmmu_intf.c
- ${CMAKE_CURRENT_SOURCE_DIR}/ioctl/gmmu_ioctl.c
- ${CMAKE_CURRENT_SOURCE_DIR}/isr/gmmu_isr.c
- ${CMAKE_CURRENT_SOURCE_DIR}/mem/gmmu_mem.c
- ${CMAKE_CURRENT_SOURCE_DIR}/base/gmmu_comm.c
-)
-set(GPU_SRC_LIST "${GPU_SRC_LIST}" "${gmmu_drv_list}" CACHE INTERNAL "platform src obj list" FORCE)
-
-set(
- gmmu_drv_header_list
- ${CMAKE_CURRENT_SOURCE_DIR}/base
- ${CMAKE_CURRENT_SOURCE_DIR}/clock
- ${CMAKE_CURRENT_SOURCE_DIR}/context
- ${CMAKE_CURRENT_SOURCE_DIR}/dev
- ${CMAKE_CURRENT_SOURCE_DIR}/dfx
- ${CMAKE_CURRENT_SOURCE_DIR}/hal
- ${CMAKE_CURRENT_SOURCE_DIR}/include
- ${CMAKE_CURRENT_SOURCE_DIR}/intf
- ${CMAKE_CURRENT_SOURCE_DIR}/ioctl
- ${CMAKE_CURRENT_SOURCE_DIR}/isr
- ${CMAKE_CURRENT_SOURCE_DIR}/mem
-)
-set(GPU_INC_LIST "${GPU_INC_LIST}" "${gmmu_drv_header_list}" CACHE INTERNAL "platform src obj list" FORCE)
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu capability
- */
-
-#ifndef DRV_GRAPHICS_GMMU_CAPABILITY_H
-#define DRV_GRAPHICS_GMMU_CAPABILITY_H
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-#define GMMU_MAX_WIDTH 640
-#define GMMU_MAX_HEIGHT 640
-#define GMMU_MAX_HEIGHT_HALF ((GMMU_MAX_HEIGHT) / 2)
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_CAPABILITY_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu comm
- */
-
-#include "gmmu_comm.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_s32 gmmu_round(td_float x)
-{
- return gmmu_floor(x + 0.5f);
-}
-
-td_s32 gmmu_floor(td_float x)
-{
- if (x > 0) {
- return (td_s32)(x);
- } else {
- if (x - (td_s32)(x) < 0) {
- return (td_s32)(x - 1);
- } else {
- return (td_s32)(x);
- }
- }
-}
-
-td_u32 gmmu_approx_up(td_u32 x)
-{
- td_u32 res = 0;
- td_u32 temp = x;
- td_u32 count = 0;
- const td_u32 shift = 1;
-
- if (x == 1) {
- return 1;
- }
-
- while (temp != 0) {
- count++;
- temp /= 2; /* 2 for sqrt */
- }
- res = shift << count;
- if ((x < res) && (2 * x > res)) { /* 2 for sqrt */
- return res;
- } else {
- return x;
- }
-}
-
-td_s32 gmmu_ceil(td_float x)
-{
- if (x > 0) {
- if (x - (td_s32)(x) > 0) {
- return (td_s32)(x + 1);
- } else {
- return (td_s32)(x);
- }
- } else {
- return (td_s32)(x);
- }
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu comm
- */
-
-#ifndef DRV_GRAPHICS_GMMU_COMM_H
-#define DRV_GRAPHICS_GMMU_COMM_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-td_s32 gmmu_round(td_float x);
-td_s32 gmmu_floor(td_float x);
-td_u32 gmmu_approx_up(td_u32 x);
-td_s32 gmmu_ceil(td_float x);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_COMM_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu clock
- */
-
-#include "gmmu_clock.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_void gmmu_clock_open(td_void)
-{
- return;
-}
-
-td_void gmmu_clock_close(td_void)
-{
- return;
-}
-
-td_void gmmu_clock_reset(td_void)
-{
- return;
-}
-
-td_void gmmu_clock_dereset(td_void)
-{
- return;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu clock
- */
-
-#ifndef DRV_GRAPHICS_GMMU_CLOCK_H
-#define DRV_GRAPHICS_GMMU_CLOCK_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_void gmmu_clock_open(td_void);
-td_void gmmu_clock_close(td_void);
-td_void gmmu_clock_reset(td_void);
-td_void gmmu_clock_dereset(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_CLOCK_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu context
- */
-
-#include "gmmu_context.h"
-#include "gmmu_mem.h"
-#include "gmmu_dfx.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-static gmmu_context_struct *g_gmmu_context = TD_NULL;
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_void gmmu_context_init(td_void)
-{
- td_s32 ret;
-
- if (g_gmmu_context != TD_NULL) {
- g_gmmu_context->init_count = 1;
- return;
- }
-
- g_gmmu_context = (gmmu_context_struct *)gmmu_mem_small_alloc(sizeof(gmmu_context_struct));
- if (g_gmmu_context == TD_NULL) {
- gmmu_err("call gmmu_mem_small_alloc failure");
- return;
- }
-
- ret = memset_s(g_gmmu_context, sizeof(gmmu_context_struct), 0x0, sizeof(gmmu_context_struct));
- if (ret != EOK) {
- gmmu_mem_small_free((td_void *)g_gmmu_context);
- g_gmmu_context = TD_NULL;
- gmmu_err("call memset_s failure");
- return;
- }
-
- osal_spin_lock_init(&g_gmmu_context->lock);
-
- return;
-}
-
-td_void gmmu_context_deinit(td_void)
-{
- if (g_gmmu_context == TD_NULL) {
- return;
- }
-
- gmmu_mem_small_free((td_void *)g_gmmu_context);
- g_gmmu_context = TD_NULL;
-
- return;
-}
-
-gmmu_context_struct *gmmu_context_get(td_void)
-{
- return g_gmmu_context;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu context
- */
-
-#ifndef DRV_GRAPHICS_GMMU_CONTEXT_H
-#define DRV_GRAPHICS_GMMU_CONTEXT_H
-
-#include "td_type.h"
-#include "soc_osal.h"
-#include "gmmu_dfx.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef struct {
- td_u8 init_count;
- osal_atomic ref_count;
- osal_spinlock lock;
- volatile td_u32 *reg_base;
- drv_gmmu_dfx gmmu_dfx;
-} gmmu_context_struct, gmmu_context_ptr;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_void gmmu_context_init(td_void);
-td_void gmmu_context_deinit(td_void);
-gmmu_context_struct *gmmu_context_get(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_CONTEXT_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu dev
- */
-
-#include "gmmu_dev.h"
-#include "gmmu_context.h"
-#include "gmmu_clock.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_s32 gmmu_dev_open(td_void)
-{
- td_s32 open_cnt = 0;
- td_ulong lock_flag = 0;
- gmmu_context_struct *gmmu_context = gmmu_context_get();
- osal_spin_lock_irqsave(&gmmu_context->lock, &lock_flag);
-
- gmmu_context->gmmu_dfx.open_times++;
-
- open_cnt = osal_atomic_read(&gmmu_context->ref_count);
- osal_atomic_inc(&gmmu_context->ref_count);
-
- if (open_cnt != 0) {
- osal_spin_unlock_irqrestore(&gmmu_context->lock, &lock_flag);
- return EXT_SUCCESS;
- }
-
- osal_spin_unlock_irqrestore(&gmmu_context->lock, &lock_flag);
-
- gmmu_clock_open();
- gmmu_clock_dereset();
-
- return EXT_SUCCESS;
-}
-
-td_s32 gmmu_dev_close(td_void)
-{
- td_s32 open_cnt = 0;
- td_ulong lock_flag = 0;
- gmmu_context_struct *gmmu_context = gmmu_context_get();
- osal_spin_lock_irqsave(&gmmu_context->lock, &lock_flag);
-
- gmmu_context->gmmu_dfx.close_times++;
-
- open_cnt = osal_atomic_read(&gmmu_context->ref_count);
- if (open_cnt <= 0) {
- osal_spin_unlock_irqrestore(&gmmu_context->lock, &lock_flag);
- return EXT_FAILURE;
- }
-
- osal_atomic_dec(&gmmu_context->ref_count);
-
- open_cnt = osal_atomic_read(&gmmu_context->ref_count);
- if (open_cnt != 0) {
- osal_spin_unlock_irqrestore(&gmmu_context->lock, &lock_flag);
- return EXT_SUCCESS;
- }
- osal_spin_unlock_irqrestore(&gmmu_context->lock, &lock_flag);
-
- gmmu_clock_reset();
- gmmu_clock_close();
-
- return EXT_SUCCESS;
-}
-
-td_s32 gmmu_suspend(td_void)
-{
- gmmu_clock_reset();
- gmmu_clock_close();
- return EXT_SUCCESS;
-}
-
-td_s32 gmmu_resume(td_void)
-{
- gmmu_clock_open();
- gmmu_clock_dereset();
- return EXT_SUCCESS;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu dev
- */
-
-#ifndef DRV_GRAPHICS_GMMU_DEV_H
-#define DRV_GRAPHICS_GMMU_DEV_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_s32 gmmu_dev_open(td_void);
-td_s32 gmmu_dev_close(td_void);
-td_s32 gmmu_suspend(td_void);
-td_s32 gmmu_resume(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_DEV_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu dfx
- */
-
-#include "gmmu_dfx.h"
-#include "drv_gfx_port.h"
-#include "gmmu_context.h"
-#include "gmmu_reg.h"
-
-#define GMMU_PRINT_OFFSET_4 4
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-static td_void gmmu_dfx_proc_read(gmmu_context_struct *gmmu_context);
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_s32 gmmu_dfx_print_proc_info(int argc, const char *argv[])
-{
- gmmu_context_struct *gmmu_context = NULL;
-
- if (argc < 2) { /* 2: index */
- gmmu_print("usage: gmmu_proc 0or1 0or1");
- return EXT_FAILURE;
- }
-
- gmmu_context = gmmu_context_get();
- if (gmmu_context == TD_NULL) {
- gmmu_err("call gmmu_context_get failure");
- return EXT_FAILURE;
- }
- gmmu_context->gmmu_dfx.proc_en = (td_bool)strtoul(argv[0], TD_NULL, 10); /* 10: index */
- gmmu_context->gmmu_dfx.lut_en = (td_bool)strtoul(argv[1], TD_NULL, 10); /* 10: index */
-
- gmmu_dfx_proc_read(gmmu_context);
-
- return EXT_SUCCESS;
-}
-
-static td_void gmmu_dfx_proc_read(gmmu_context_struct *gmmu_context)
-{
- td_u32 fb_vir_mem_size = gmmu_context->gmmu_dfx.output_size;
- td_u32 fb_phy_mem_size = gmmu_context->gmmu_dfx.phy_mem_size;
- td_u32 fb0_offset = gmmu_context->gmmu_dfx.addr0_offset;
- td_u32 fb1_offset = gmmu_context->gmmu_dfx.addr1_offset;
- td_u64 *lut_addr = (td_u64 *)gmmu_context->gmmu_dfx.lut_vir;
-
- if (gmmu_context->gmmu_dfx.proc_en != TD_TRUE) {
- gmmu_print("should enable proc for call gmmu_proc 1 0");
- return;
- }
-
- gmmu_print("\n----------------------- gmmu proc -----------------------\n");
- gmmu_print("\n----------- gmmu input and output -------\n");
- gmmu_print("open times :%u\n", gmmu_context->gmmu_dfx.open_times);
- gmmu_print("close times :%u\n", gmmu_context->gmmu_dfx.close_times);
- gmmu_print("input bpp :%u\n", gmmu_context->gmmu_dfx.input_bpp);
- gmmu_print("input width :%u\n", gmmu_context->gmmu_dfx.input_width);
- gmmu_print("input height :%u\n", gmmu_context->gmmu_dfx.input_height);
- gmmu_print("fb vir mem size :%u[%uKB]\n", fb_vir_mem_size, fb_vir_mem_size / 1024); /* 1024: index */
- gmmu_print("fb phy mem size :%u[%uKB]\n", fb_phy_mem_size, fb_phy_mem_size / 1024); /* 1024: index */
- gmmu_print("fb mem size :%u\n", gmmu_context->gmmu_dfx.output_size);
- gmmu_print("fb mem stride :%u\n", gmmu_context->gmmu_dfx.output_stride);
- gmmu_print("fb0 mem offset :%u[%uKB]\n", fb0_offset, fb0_offset / 1024); /* 1024: index */
- gmmu_print("fb1 mem offset :%u[%uKB]\n", fb1_offset, fb1_offset / 1024); /* 1024: index */
- gmmu_print("lut mem size :%u\n", gmmu_context->gmmu_dfx.lut_size);
- gmmu_print("\n--------------- gmmu setting -----------\n");
- gmmu_print("gmmu reg length :0x%x\n", GMMU_REG_LENGTH);
-
- if (gmmu_context->gmmu_dfx.lut_en != TD_TRUE) {
- return;
- }
-
- for (td_u16 y = 0; y < (gmmu_context->gmmu_dfx.input_height + 1) / 2; y++) { /* 2: index */
- td_u64 data = *(lut_addr + y);
- gmmu_print("0x%x 0x%x\n", (td_u32)(data & 0xffffffff), (td_u32)((data >> 32) & 0xffffffff)); /* 32: index */
- }
-
- return;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu dfx
- */
-
-#ifndef DRV_GRAPHICS_GMMU_DFX_H
-#define DRV_GRAPHICS_GMMU_DFX_H
-
-#include <stdio.h>
-#include <securec.h>
-#include "td_base.h"
-#include "soc_osal.h"
-#ifdef NO_UART_DEBUG
-#include "soc_diag_util.h"
-#include "log_oam_logger.h"
-#include "log_def.h"
-#endif
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-#ifdef NO_UART_DEBUG
-#define gmmu_err(fmt, args...) uapi_diag_error_log(0, fmt, ##args)
-#define gmmu_print(fmt, args...) uapi_diag_debug_log(0, fmt, ##args)
-#else
-#define gmmu_err(fmt, args...) printf("[GMMU_ERROR][%s %d]"fmt"\n", __func__, __LINE__, ##args)
-#define gmmu_print(fmt, args...) printf(fmt, ##args)
-#endif
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef struct {
- td_bool proc_en;
- td_bool lut_en;
- td_u32 open_times;
- td_u32 close_times;
- td_u8 input_bpp;
- td_u32 input_width;
- td_u32 input_height;
- td_u32 output_size;
- td_u32 output_stride;
- td_u32 output_addr0;
- td_u32 output_addr1;
- td_u32 phy_addr0;
- td_u32 phy_addr1;
- td_u32 addr0_offset;
- td_u32 addr1_offset;
- td_char* lut_vir;
- td_u32 lut_size;
- td_u32 phy_mem_size;
-} drv_gmmu_dfx;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_s32 gmmu_dfx_print_proc_info(int argc, const char *argv[]);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_DFX_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu hal
- */
-
-#include "gmmu_hal.h"
-#include "gmmu_reg.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-static gmmu_regs_struct g_gmmu_reg_bak = { 0 };
-static volatile gmmu_regs_ptr g_gmmu_reg = TD_NULL;
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_void gmmu_hal_save_scene(td_void)
-{
- if (g_gmmu_reg != TD_NULL) {
- g_gmmu_reg_bak = *g_gmmu_reg;
- }
-
- return;
-}
-
-td_void gmmu_hal_restore_scene(td_void)
-{
- if (g_gmmu_reg != TD_NULL) {
- *g_gmmu_reg = g_gmmu_reg_bak;
- }
-
- return;
-}
-
-static td_u32 gmmu_hal_read(uintptr_t addr)
-{
- return *((volatile td_u32 *)addr);
-}
-
-static td_void gmmu_hal_write(uintptr_t addr, td_u32 value)
-{
- *((volatile td_u32 *)addr) = value;
-}
-
-td_void gmmu_hal_init(volatile td_u32 *reg_base)
-{
- g_gmmu_reg = (gmmu_regs_ptr)reg_base;
-}
-
-td_void gmmu_hal_deinit(td_void)
-{
- g_gmmu_reg = TD_NULL;
-}
-
-td_void gmmu_hal_set_ck_enable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.ck_en = 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_ck_disable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.ck_en = 0x0;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_work_enable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.work_en = 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_work_disable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.work_en = 0x0;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_rchn_mask_enable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.rchn_mask_en = 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_rchn_mask_disable(td_void)
-{
- volatile u_gmmu_ctrl ctrl;
- ctrl.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->ctrl.u32)));
- ctrl.bits.rchn_mask_en = 0x0;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->ctrl.u32)), ctrl.u32);
-}
-
-td_void gmmu_hal_set_stride(td_u32 value)
-{
- volatile u_gmmu_info info;
- info.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->info.u32)));
- if (value == 512) { /* 512 for 2 ^ 9 need 9 bits */
- info.bits.stride = 0;
- } else if (value == 1024) { /* 1024 for 2 ^ 10 need 10 bits */
- info.bits.stride = 0x1;
- } else if (value == 2048) { /* 2048 for 2 ^ 11 need 11 bits */
- info.bits.stride = 0x2;
- } else if (value == 4096) { /* 4096 for 2 ^ 12 need 12 bits */
- info.bits.stride = 0x3;
- } else {
- /* nothing to do */
- }
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->info.u32)), info.u32);
-}
-
-td_void gmmu_hal_set_line_end(td_u32 value)
-{
- volatile u_gmmu_info info;
- info.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->info.u32)));
- info.bits.line_end = value - 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->info.u32)), info.u32);
-}
-
-td_void gmmu_hal_set_height(td_u32 value)
-{
- volatile u_gmmu_reso reso;
- reso.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->reso.u32)));
- reso.bits.height = value - 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->reso.u32)), reso.u32);
-}
-
-td_void gmmu_hal_set_virtual_data(td_u32 value)
-{
- volatile u_gmmu_virtual_data virtual_data;
- virtual_data.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->virtual_data.u32)));
- virtual_data.bits.data = value;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->virtual_data.u32)), virtual_data.u32);
-}
-
-td_void gmmu_hal_set_mem_size(td_u32 value)
-{
- volatile u_gmmu_size size;
- size.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->size.u32)));
- size.bits.size = value;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->size.u32)), size.u32);
-}
-
-td_u32 gmmu_hal_get_err(td_void)
-{
- volatile u_gmmu_err err;
- err.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->err.u32)));
- return err.u32;
-}
-
-td_void gmmu_hal_set_err_clr(td_void)
-{
- volatile u_gmmu_err_clr err_clr;
- err_clr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->err_clr.u32)));
- err_clr.bits.wcmmu_line_num_out_range = 0x1;
- err_clr.bits.rcmmu_line_num_out_range = 0x1;
- err_clr.bits.cfg_addr_out_range = 0x1;
- err_clr.bits.phy_raddr_out_range = 0x1;
- err_clr.bits.phy_waddr_out_range = 0x1;
- err_clr.bits.cfg_cmmu_conflict = 0x1;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->err_clr.u32)), err_clr.u32);
-}
-
-td_void gmmu_hal_set_err_mask(td_void)
-{
- volatile u_gmmu_err_mask err_mask;
- err_mask.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->err_mask.u32)));
- err_mask.bits.wcmmu_line_num_out_range = 0x0;
- err_mask.bits.rcmmu_line_num_out_range = 0x0;
- err_mask.bits.cfg_addr_out_range = 0x0;
- err_mask.bits.phy_raddr_out_range = 0x0;
- err_mask.bits.phy_waddr_out_range = 0x0;
- err_mask.bits.cfg_cmmu_conflict = 0x0;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->err_mask.u32)), err_mask.u32);
-}
-
-td_void gmmu_hal_set_addr_offset(td_u32 value, int addr_num)
-{
- volatile u_gmmu_addr_offset addr0_offset;
- volatile u_gmmu_addr_offset addr1_offset;
- addr0_offset.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->addr0_offset.u32)));
- addr1_offset.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->addr1_offset.u32)));
- if (addr_num == 0) {
- addr0_offset.bits.offset = value;
- } else {
- addr1_offset.bits.offset = value;
- }
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->addr0_offset.u32)), addr0_offset.u32);
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->addr1_offset.u32)), addr1_offset.u32);
-}
-
-td_u32 gmmu_hal_get_dfx_rlut_rdata(td_void)
-{
- volatile u_gmmu_dfx_rlut_rdata dfx_rlut_rdata;
- dfx_rlut_rdata.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_rlut_rdata.u32)));
- return dfx_rlut_rdata.bits.rlut_rdata;
-}
-
-td_u32 gmmu_hal_get_dfx_rchn_vir_addr(td_void)
-{
- volatile u_gmmu_dfx_rchn_vir_addr dfx_rchn_vir_addr;
- dfx_rchn_vir_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_rchn_vir_addr.u32)));
- return dfx_rchn_vir_addr.bits.rchn_vir_addr;
-}
-
-td_u32 gmmu_hal_get_dfx_rchn_phy_addr(td_void)
-{
- volatile u_gmmu_dfx_rchn_phy_addr dfx_rchn_phy_addr;
- dfx_rchn_phy_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_rchn_phy_addr.u32)));
- return dfx_rchn_phy_addr.bits.rchn_phy_addr;
-}
-
-td_u32 gmmu_hal_get_dfx_wlut_rdata(td_void)
-{
- volatile u_gmmu_dfx_wlut_rdata dfx_wlut_rdata;
- dfx_wlut_rdata.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_wlut_rdata.u32)));
- return dfx_wlut_rdata.bits.wlut_rdata;
-}
-
-td_u32 gmmu_hal_get_dfx_wchn_vir_addr(td_void)
-{
- volatile u_gmmu_dfx_wchn_vir_addr dfx_wchn_vir_addr;
- dfx_wchn_vir_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_wchn_vir_addr.u32)));
- return dfx_wchn_vir_addr.bits.wchn_vir_addr;
-}
-
-td_u32 gmmu_hal_get_dfx_wchn_phy_addr(td_void)
-{
- volatile u_gmmu_dfx_wchn_phy_addr dfx_wchn_phy_addr;
- dfx_wchn_phy_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->dfx_wchn_phy_addr.u32)));
- return dfx_wchn_phy_addr.bits.wchn_phy_addr;
-}
-
-td_void gmmu_hal_set_cfg_rchn_vir_addr(td_u32 value)
-{
- volatile u_gmmu_cfg_rchn_vir_addr cfg_rchn_vir_addr;
- cfg_rchn_vir_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->cfg_rchn_vir_addr.u32)));
- cfg_rchn_vir_addr.bits.rchn_vir_addr = value;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->cfg_rchn_vir_addr.u32)), cfg_rchn_vir_addr.u32);
-}
-
-td_void gmmu_hal_set_cfg_wchn_vir_addr(td_u32 value)
-{
- volatile u_gmmu_cfg_wchn_vir_addr cfg_wchn_vir_addr;
- cfg_wchn_vir_addr.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->cfg_wchn_vir_addr.u32)));
- cfg_wchn_vir_addr.bits.wchn_vir_addr = value;
- gmmu_hal_write((uintptr_t)(&(g_gmmu_reg->cfg_wchn_vir_addr.u32)), cfg_wchn_vir_addr.u32);
-}
-
-td_u32 gmmu_hal_get_rchn_phy_addr_outrange(td_void)
-{
- volatile u_gmmu_rchn_phy_addr_outrange rchn_phy_addr_outrange;
- rchn_phy_addr_outrange.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->rchn_phy_addr_outrange.u32)));
- return rchn_phy_addr_outrange.bits.rchn_phy_addr_outrange;
-}
-
-td_u32 gmmu_hal_get_wchn_phy_addr_outrange(td_void)
-{
- volatile u_gmmu_wchn_phy_addr_outrange wchn_phy_addr_outrange;
- wchn_phy_addr_outrange.u32 = gmmu_hal_read((uintptr_t)(&(g_gmmu_reg->wchn_phy_addr_outrange.u32)));
- return wchn_phy_addr_outrange.bits.wchn_phy_addr_outrange;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu hal
- */
-
-#ifndef DRV_GRAPHICS_GMMU_HAL_H
-#define DRV_GRAPHICS_GMMU_HAL_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_void gmmu_hal_init(volatile td_u32 *reg_base);
-td_void gmmu_hal_deinit(td_void);
-
-td_void gmmu_hal_save_scene(td_void);
-td_void gmmu_hal_restore_scene(td_void);
-
-td_void gmmu_hal_set_ck_enable(td_void);
-td_void gmmu_hal_set_ck_disable(td_void);
-td_void gmmu_hal_set_work_enable(td_void);
-td_void gmmu_hal_set_work_disable(td_void);
-td_void gmmu_hal_set_rchn_mask_enable(td_void);
-td_void gmmu_hal_set_rchn_mask_disable(td_void);
-
-td_void gmmu_hal_set_stride(td_u32 value);
-td_void gmmu_hal_set_line_end(td_u32 value);
-
-td_void gmmu_hal_set_height(td_u32 value);
-
-td_void gmmu_hal_set_virtual_data(td_u32 value);
-
-td_void gmmu_hal_set_mem_size(td_u32 value);
-
-td_u32 gmmu_hal_get_err(td_void);
-td_void gmmu_hal_set_err_clr(td_void);
-td_void gmmu_hal_set_err_mask(td_void);
-
-td_void gmmu_hal_set_addr_offset(td_u32 value, int addr_num);
-
-td_u32 gmmu_hal_get_dfx_rlut_rdata(td_void);
-td_u32 gmmu_hal_get_dfx_rchn_vir_addr(td_void);
-td_u32 gmmu_hal_get_dfx_rchn_phy_addr(td_void);
-td_u32 gmmu_hal_get_dfx_wlut_rdata(td_void);
-td_u32 gmmu_hal_get_dfx_wchn_vir_addr(td_void);
-td_u32 gmmu_hal_get_dfx_wchn_phy_addr(td_void);
-
-td_void gmmu_hal_set_cfg_rchn_vir_addr(td_u32 value);
-td_void gmmu_hal_set_cfg_wchn_vir_addr(td_u32 value);
-td_u32 gmmu_hal_get_rchn_phy_addr_outrange(td_void);
-td_u32 gmmu_hal_get_wchn_phy_addr_outrange(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_HAL_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu reg
- */
-
-#ifndef DRV_GRAPHICS_GMMU_REG_H
-#define DRV_GRAPHICS_GMMU_REG_H
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-#define GMMU_REG_BASEADDR (0x56040000)
-#define GMMU_REG_LENGTH (0xFF)
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef union {
- struct {
- unsigned int ck_en : 1; /* [0] */
- unsigned int work_en : 1; /* [1] */
- unsigned int rchn_mask_en : 1; /* [2] */ /* used with gmmu_fix_data */
- unsigned int reserved : 29; /* [31..3] */
- } bits;
- unsigned int u32;
-} u_gmmu_ctrl;
-
-typedef union {
- struct {
- unsigned int stride : 2; /* [1..0] */
- unsigned int reserved0 : 2; /* [3..2] */
- unsigned int line_end : 12; /* [15..4] */
- unsigned int reserved1 : 16; /* [31..16] */
- } bits;
- unsigned int u32;
-} u_gmmu_info;
-
-typedef union {
- struct {
- unsigned int height : 10; /* [9..0] */
- unsigned int reserved : 22; /* [31..10] */
- } bits;
- unsigned int u32;
-} u_gmmu_reso;
-
-typedef union {
- struct {
- unsigned int data : 8; /* [7..0] */ /* used with rchn_mask_en */
- unsigned int reserved : 24; /* [31..8] */
- } bits;
- unsigned int u32;
-} u_gmmu_virtual_data;
-
-typedef union {
- struct {
- unsigned int size : 21; /* [20..0] */
- unsigned int reserved : 11; /* [31..21] */
- } bits;
- unsigned int u32;
-} u_gmmu_size;
-
-typedef union {
- struct {
- unsigned int wcmmu_line_num_out_range : 1; /* [0] */
- unsigned int rcmmu_line_num_out_range : 1; /* [1] */
- unsigned int cfg_addr_out_range : 1; /* [2] */
- unsigned int phy_raddr_out_range : 1; /* [3] */
- unsigned int phy_waddr_out_range : 1; /* [4] */
- unsigned int cfg_cmmu_conflict : 1; /* [5] */
- unsigned int reserved : 26; /* [31..6] */
- } bits;
- unsigned int u32;
-} u_gmmu_err;
-
-typedef union {
- struct {
- unsigned int wcmmu_line_num_out_range : 1; /* [0] */
- unsigned int rcmmu_line_num_out_range : 1; /* [1] */
- unsigned int cfg_addr_out_range : 1; /* [2] */
- unsigned int phy_raddr_out_range : 1; /* [3] */
- unsigned int phy_waddr_out_range : 1; /* [4] */
- unsigned int cfg_cmmu_conflict : 1; /* [5] */
- unsigned int reserved : 26; /* [31..6] */
- } bits;
- unsigned int u32;
-} u_gmmu_err_clr;
-
-typedef union {
- struct {
- unsigned int wcmmu_line_num_out_range : 1; /* [0] */
- unsigned int rcmmu_line_num_out_range : 1; /* [1] */
- unsigned int cfg_addr_out_range : 1; /* [2] */
- unsigned int phy_raddr_out_range : 1; /* [3] */
- unsigned int phy_waddr_out_range : 1; /* [4] */
- unsigned int cfg_cmmu_conflict : 1; /* [5] */
- unsigned int reserved : 26; /* [31..6] */
- } bits;
- unsigned int u32;
-} u_gmmu_err_mask;
-
-typedef union {
- struct {
- unsigned int offset : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_addr_offset;
-
-typedef union {
- struct {
- unsigned int rlut_rdata : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_rlut_rdata;
-
-typedef union {
- struct {
- unsigned int rchn_vir_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_rchn_vir_addr;
-
-typedef union {
- struct {
- unsigned int rchn_phy_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_rchn_phy_addr;
-
-typedef union {
- struct {
- unsigned int wlut_rdata : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_wlut_rdata;
-
-typedef union {
- struct {
- unsigned int wchn_vir_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_wchn_vir_addr;
-
-typedef union {
- struct {
- unsigned int wchn_phy_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_dfx_wchn_phy_addr;
-
-typedef union {
- struct {
- unsigned int rchn_vir_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_cfg_rchn_vir_addr;
-
-typedef union {
- struct {
- unsigned int wchn_vir_addr : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_cfg_wchn_vir_addr;
-
-typedef union {
- struct {
- unsigned int rchn_phy_addr_outrange : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_rchn_phy_addr_outrange;
-
-typedef union {
- struct {
- unsigned int wchn_phy_addr_outrange : 32; /* [31..0] */
- } bits;
- unsigned int u32;
-} u_gmmu_wchn_phy_addr_outrange;
-
-typedef struct {
- u_gmmu_ctrl ctrl; /* 0x0 */
- u_gmmu_info info; /* 0x4 */
- u_gmmu_reso reso; /* 0x8 */
- u_gmmu_virtual_data virtual_data; /* 0xC */
- unsigned int reserved0; /* 0x10 */
- u_gmmu_size size; /* 0x14 */
- u_gmmu_err err; /* 0x18 */
- u_gmmu_err_clr err_clr; /* 0x1C */
- u_gmmu_err_mask err_mask; /* 0x20 */
- u_gmmu_addr_offset addr0_offset; /* 0x24 */
- u_gmmu_addr_offset addr1_offset; /* 0x28 */
- unsigned int reserved1[5]; /* 0x2c~0x3C */
- u_gmmu_dfx_rlut_rdata dfx_rlut_rdata; /* 0x40 */
- u_gmmu_dfx_rchn_vir_addr dfx_rchn_vir_addr; /* 0x44 */
- u_gmmu_dfx_rchn_phy_addr dfx_rchn_phy_addr; /* 0x48 */
- u_gmmu_dfx_wlut_rdata dfx_wlut_rdata; /* 0x4c */
- u_gmmu_dfx_wchn_vir_addr dfx_wchn_vir_addr; /* 0x50 */
- u_gmmu_dfx_wchn_phy_addr dfx_wchn_phy_addr; /* 0x54 */
- u_gmmu_cfg_rchn_vir_addr cfg_rchn_vir_addr; /* 0x58 */
- u_gmmu_cfg_wchn_vir_addr cfg_wchn_vir_addr; /* 0x5C */
- u_gmmu_rchn_phy_addr_outrange rchn_phy_addr_outrange; /* 0x60 */
- u_gmmu_wchn_phy_addr_outrange wchn_phy_addr_outrange; /* 0x64 */
-} gmmu_regs_struct, *gmmu_regs_ptr;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_REG_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: drv gmmu intf
- */
-
-#ifndef DRV_GRAPHICS_DRV_GMMU_INTF_H
-#define DRV_GRAPHICS_DRV_GMMU_INTF_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-typedef td_s32 (*pfn_gmmu_suspend)(td_void);
-typedef td_s32 (*pfn_gmmu_resume)(td_void);
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef struct {
- pfn_gmmu_suspend suspend;
- pfn_gmmu_resume resume;
-} drv_gmmu_export_func;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_s32 drv_gmmu_module_init(td_void);
-td_void drv_gmmu_module_exit(td_void);
-
-td_s32 drv_gmmu_suspend(td_void *private_data);
-td_s32 drv_gmmu_resume(td_void *private_data);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_DRV_GMMU_INTF_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: drv gmmu ioctl
- */
-
-#ifndef DRV_GRAPHICS_DRV_GMMU_IOCTL_H
-#define DRV_GRAPHICS_DRV_GMMU_IOCTL_H
-
-#include <stdio.h>
-#include "td_base.h"
-#include "drv_gmmu_struct.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-#define GMMU_DEV_NAME "/dev/gmmu"
-
-#define DRV_GMMU_CMD_CONFIG 0
-
-td_s32 gmmu_open(const td_char *path_name, td_s32 flags, td_s32 mode);
-td_s32 gmmu_ioctl(td_s32 module_idx, td_ulong ioctl_cmd, td_void *para);
-td_s32 gmmu_close(td_s32 module_idx);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_DRV_GMMU_IOCTL_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: drv gmmu struct
- */
-
-#ifndef DRV_GRAPHICS_DRV_GMMU_STRUCT_H
-#define DRV_GRAPHICS_DRV_GMMU_STRUCT_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-#define DRV_GMMU_MASK 0x0123456789ABCDEF
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef struct {
- td_u64 mask;
- td_u8 input_bpp;
- td_u32 input_width;
- td_u32 input_height;
- td_u8 offset;
- td_u32 output_size;
- td_u32 output_stride;
- td_u32 output_addr0;
- td_u32 output_addr1;
-} drv_gmmu_mgr;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_DRV_GMMU_STRUCT_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: drv gmmu intf
- */
-
-#include "drv_gmmu_intf.h"
-#include "soc_osal.h"
-#include "drv_gmmu_ioctl.h"
-#include "gmmu_comm.h"
-#include "gmmu_ioctl.h"
-#include "gmmu_hal.h"
-#include "gmmu_reg.h"
-#include "gmmu_dev.h"
-#include "gmmu_isr.h"
-#include "gmmu_context.h"
-#include "gmmu_dfx.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-#define DRV_GMMU_IOCTL_CMD_NUM 2
-
-static td_bool g_gmmu_suspend_flag = TD_FALSE;
-static drv_gmmu_mgr g_gmmu_suspend_mgr = { 0 };
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-static td_s32 drv_gmmu_open(td_void *private_data);
-static td_s32 drv_gmmu_close(td_void *private_data);
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-static osal_ioctl_cmd g_gmmu_ioctl_cmd_list[DRV_GMMU_IOCTL_CMD_NUM] = {
- { DRV_GMMU_CMD_CONFIG, gmmu_ioctl_config },
- { DRV_GMMU_IOCTL_CMD_NUM - 1, TD_NULL },
-};
-
-static osal_fileops g_gmmu_file_fops = {
- .open = drv_gmmu_open,
- .release = drv_gmmu_close,
- .cmd_list = g_gmmu_ioctl_cmd_list,
- .cmd_cnt = DRV_GMMU_IOCTL_CMD_NUM,
-};
-
-static osal_pmops g_gmmu_ops = {
- .pm_suspend = drv_gmmu_suspend,
- .pm_resume = drv_gmmu_resume,
-};
-
-static osal_dev g_gmmu_register_data = {
- .minor = 0,
- .fops = &g_gmmu_file_fops,
- .pmops = &g_gmmu_ops,
-};
-
-/*-------------------------------- func release -------------------------------------------*/
-
-static td_s32 drv_gmmu_open(td_void *private_data)
-{
- uapi_unused(private_data);
-
- return EXT_SUCCESS;
-}
-
-static td_s32 drv_gmmu_close(td_void *private_data)
-{
- uapi_unused(private_data);
-
- return EXT_SUCCESS;
-}
-
-td_s32 drv_gmmu_suspend(td_void *private_data)
-{
- uapi_unused(private_data);
-
- gmmu_hal_save_scene();
-
- g_gmmu_suspend_flag = TD_TRUE;
-
- return EXT_SUCCESS;
-}
-
-td_s32 drv_gmmu_resume(td_void *private_data)
-{
- uapi_unused(private_data);
-
- if (g_gmmu_suspend_flag) {
- gmmu_hal_restore_scene();
-#ifdef CONFIG_CLDO1PD_SUPPORT
- gmmu_ioctl_config(DRV_GMMU_CMD_CONFIG, &g_gmmu_suspend_mgr, TD_NULL);
-#endif
- g_gmmu_suspend_flag = TD_FALSE;
- }
-
- return EXT_SUCCESS;
-}
-
-td_s32 gmmu_open(const td_char *path_name, td_s32 flags, td_s32 mode)
-{
- uapi_unused(path_name);
- uapi_unused(flags);
- uapi_unused(mode);
-
- return gmmu_dev_open();
-}
-
-td_s32 gmmu_close(td_s32 module_idx)
-{
- uapi_unused(module_idx);
-
- return gmmu_dev_close();
-}
-
-td_s32 gmmu_ioctl(td_s32 module_idx, td_ulong ioctl_cmd, td_void *para)
-{
- uapi_unused(module_idx);
-
- if (ioctl_cmd >= DRV_GMMU_IOCTL_CMD_NUM) {
- gmmu_err("Invalid cmd, cmd = %lu!", ioctl_cmd);
- return EXT_FAILURE;
- }
-
- if (g_gmmu_suspend_flag == TD_TRUE) {
- gmmu_err("gmmu is in suspend state!, suspend_flag = %u", g_gmmu_suspend_flag);
- return EXT_FAILURE;
- }
-
- if ((ioctl_cmd == DRV_GMMU_CMD_CONFIG) && (para != TD_NULL)) {
- g_gmmu_suspend_mgr = *(drv_gmmu_mgr *)para;
- }
-
- return (td_s32)g_gmmu_ioctl_cmd_list[ioctl_cmd].handler((td_u32)ioctl_cmd, para, TD_NULL);
-}
-
-static td_s32 gmmu_register_device(td_void)
-{
- td_s32 ret;
-
- ret = snprintf_s(g_gmmu_register_data.name, OSAL_DEV_NAME_LEN - 1, strlen(GMMU_DEV_NAME), "%s", GMMU_DEV_NAME);
- if (ret <= 0) {
- gmmu_err("snprintf_s failed! ret=%d.\n", ret);
- return EXT_FAILURE;
- }
-
- if (osal_dev_register(&g_gmmu_register_data) < 0) {
- gmmu_err("register vau failed.\n");
- return EXT_FAILURE;
- }
-
- return EXT_SUCCESS;
-}
-
-static td_void gmmu_unregister_device(td_void)
-{
- osal_dev_unregister(&g_gmmu_register_data);
-}
-
-td_s32 drv_gmmu_module_init(void)
-{
- td_s32 ret;
- gmmu_context_struct *gmmu_context = gmmu_context_get();
- if ((gmmu_context != TD_NULL) && (gmmu_context->init_count != 0)) {
- return EXT_SUCCESS;
- }
-
- gmmu_context_init();
- gmmu_context = gmmu_context_get();
- if (gmmu_context == TD_NULL) {
- gmmu_err("call gmmu_context_get failure");
- return EXT_FAILURE;
- }
-
- gmmu_context->reg_base = (volatile td_u32 *)osal_ioremap_nocache(GMMU_REG_BASEADDR, GMMU_REG_LENGTH);
- if (gmmu_context->reg_base == TD_NULL) {
- gmmu_context_deinit();
- gmmu_err("call osal_ioremap_nocache failure");
- return EXT_FAILURE;
- }
- gmmu_hal_init(gmmu_context->reg_base);
-
- ret = gmmu_register_device();
- if (ret != EXT_SUCCESS) {
- osal_iounmap((td_void*)gmmu_context->reg_base, GMMU_REG_LENGTH);
- gmmu_hal_deinit();
- gmmu_context_deinit();
- gmmu_err("gmmu_register_device failed, ret:0x%x", ret);
- return EXT_FAILURE;
- }
-
- ret = gmmu_isr_init();
- if (ret != EXT_SUCCESS) {
- drv_gmmu_module_exit();
- gmmu_err("call gmmu_isr_init failure");
- return EXT_FAILURE;
- }
-
- return EXT_SUCCESS;
-}
-
-td_void drv_gmmu_module_exit(void)
-{
- gmmu_context_struct *gmmu_context = gmmu_context_get();
- if (gmmu_context == TD_NULL) {
- return;
- }
-
- if (gmmu_context->reg_base != TD_NULL) {
- osal_iounmap((td_void*)gmmu_context->reg_base, GMMU_REG_LENGTH);
- gmmu_hal_deinit();
- }
-
- gmmu_unregister_device();
-
- gmmu_context_deinit();
-
- return;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu ioctl
- */
-
-#include "gmmu_ioctl.h"
-
-#include "soc_osal.h"
-
-#include "drv_gmmu_struct.h"
-#include "gmmu_capability.h"
-#include "gmmu_comm.h"
-
-#include "gmmu_mem.h"
-#include "gmmu_hal.h"
-#include "gmmu_context.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-#define GMMU_BITS_DEPTH 8
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-typedef struct {
- td_char* lut_vir;
- td_u32 lut_size;
- td_u32 stride;
- td_u32 line_end;
- td_u32 phy_mem_size;
- td_u32 addr0_offset;
- td_u32 addr1_offset;
-} gmmu_cfg_struct;
-
-typedef struct {
- td_u32 mask_h; /* 高bit */
- td_u32 mask_l; /* 低bit */
- td_u32 first_offset_align; /* 对齐后的first_offset */
- td_u32 last_offset_align; /* 对齐后的last_offset */
- td_u32 total_offset;
-} gmmu_info;
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-static td_s32 gmmu_product_mem_info(drv_gmmu_mgr *gmmu_mgr,
- gmmu_cfg_struct *cfg_info,
- gmmu_context_struct *gmmu_context);
-
-static td_void gmmu_product_cfg_info(const drv_gmmu_mgr *input_info,
- gmmu_cfg_struct *cfg_info,
- gmmu_context_struct *gmmu_context);
-
-static td_void gmmu_product_lut(td_u32 width, td_u32 height, td_u8 offset, td_u16 *gmmu_lut, td_u32 size);
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_s32 gmmu_ioctl_config(td_u32 cmd, td_void *arg, td_void *file)
-{
- td_s32 ret;
- gmmu_cfg_struct cfg_info = {0};
- drv_gmmu_mgr *reg_mgr = (drv_gmmu_mgr *)arg;
- gmmu_context_struct *gmmu_context = gmmu_context_get();
-
- uapi_unused(cmd);
- uapi_unused(file);
-
- if ((reg_mgr == TD_NULL) || (reg_mgr->mask != DRV_GMMU_MASK) || (gmmu_context == TD_NULL)) {
- return EXT_FAILURE;
- }
-
- gmmu_context->gmmu_dfx.input_bpp = reg_mgr->input_bpp;
- gmmu_context->gmmu_dfx.input_width = reg_mgr->input_width;
- gmmu_context->gmmu_dfx.input_height = reg_mgr->input_height;
-
- if ((reg_mgr->input_width <= 0) || (reg_mgr->input_height <= 0) ||
- (reg_mgr->input_width > GMMU_MAX_WIDTH) || (reg_mgr->input_height > GMMU_MAX_HEIGHT)) {
- gmmu_err("resolution w[%u] h[%u] is not support", reg_mgr->input_width, reg_mgr->input_height);
- return EXT_FAILURE;
- }
-
- /* 16: RGB565 24: RGB888 32: ARGB8888 */
- if ((reg_mgr->input_bpp != 16) && (reg_mgr->input_bpp != 24) && (reg_mgr->input_bpp != 32)) {
- gmmu_err("bpp [%u] is not support", reg_mgr->input_bpp);
- return EXT_FAILURE;
- }
-
- cfg_info.lut_vir = (td_char *)(uintptr_t)gmmu_mem_lut_alloc();
- cfg_info.lut_size = GMMU_REG_LUT_SIZE;
- gmmu_product_cfg_info(reg_mgr, &cfg_info, gmmu_context);
- reg_mgr->output_stride = cfg_info.stride;
- reg_mgr->output_size = cfg_info.stride * reg_mgr->input_height;
- gmmu_context->gmmu_dfx.output_stride = reg_mgr->output_stride;
- gmmu_context->gmmu_dfx.output_size = reg_mgr->output_size;
-
- ret = gmmu_product_mem_info(reg_mgr, &cfg_info, gmmu_context);
- if (ret != EXT_SUCCESS) {
- gmmu_err("call gmmu_product_mem_info error");
- return EXT_FAILURE;
- }
-
- gmmu_hal_set_ck_enable();
-
- gmmu_hal_set_rchn_mask_enable();
- gmmu_hal_set_virtual_data(0x0);
-
- gmmu_hal_set_height(reg_mgr->input_height);
-
- gmmu_hal_set_stride(cfg_info.stride);
- gmmu_hal_set_line_end(cfg_info.line_end);
- gmmu_hal_set_mem_size(cfg_info.phy_mem_size);
- gmmu_hal_set_addr_offset(cfg_info.addr0_offset, 0); /* for fb 0 buffer */
- gmmu_hal_set_addr_offset(cfg_info.addr1_offset, 1); /* for fb 1 buffer */
-
- gmmu_hal_set_work_enable();
-
- return EXT_SUCCESS;
-}
-
-static td_s32 gmmu_product_mem_info(drv_gmmu_mgr *gmmu_mgr,
- gmmu_cfg_struct *cfg_info,
- gmmu_context_struct *gmmu_context)
-{
- td_u32 cmd_ts_size = GMMU_SRAM_CMD_SIZE;
- td_u32 first_offset = GMMU_SRAM_SIZE - (((cfg_info->phy_mem_size + 7) / 8) * 8) - cmd_ts_size;
- td_u32 second_offset = GMMU_SRAM_SIZE - (((cfg_info->phy_mem_size + 7) / 8) * 8) * 2 - cmd_ts_size; // two buffer
-
- gmmu_mgr->output_addr0 = GMMU_SRAM_VIR_FB0;
- gmmu_mgr->output_addr1 = GMMU_SRAM_VIR_FB1;
-
- cfg_info->addr0_offset = first_offset;
- cfg_info->addr1_offset = second_offset;
-
- gmmu_context->gmmu_dfx.output_addr0 = gmmu_mgr->output_addr0;
- gmmu_context->gmmu_dfx.output_addr1 = gmmu_mgr->output_addr1;
- gmmu_context->gmmu_dfx.phy_addr0 = GMMU_SRAM_START + cfg_info->addr0_offset;
- gmmu_context->gmmu_dfx.phy_addr1 = GMMU_SRAM_START + cfg_info->addr1_offset;
- gmmu_context->gmmu_dfx.addr0_offset = cfg_info->addr0_offset;
- gmmu_context->gmmu_dfx.addr1_offset = cfg_info->addr1_offset;
-
- return EXT_SUCCESS;
-}
-
-static td_void gmmu_product_cfg_info(const drv_gmmu_mgr *input_info,
- gmmu_cfg_struct *cfg_info,
- gmmu_context_struct *gmmu_context)
-{
- td_u64 lut_coef;
- td_u64 *lut_addr = NULL;
- td_u16 gmmu_start[GMMU_MAX_HEIGHT_HALF] = { 0 };
- td_u32 first_offset, last_offset;
- td_u32 total_offset = 0;
- td_u32 first_offset_mdy = 0;
- td_u32 last_offset_mdy = 0;
- td_u32 bdepth = GMMU_BITS_DEPTH;
- gmmu_info info = { 0 };
-
- lut_addr = (td_u64 *)cfg_info->lut_vir;
- cfg_info->stride = gmmu_approx_up(input_info->input_width * input_info->input_bpp / bdepth);
- cfg_info->line_end = input_info->input_width * input_info->input_bpp / bdepth;
-
- gmmu_product_lut(input_info->input_width, input_info->input_height,
- input_info->offset, gmmu_start, GMMU_MAX_HEIGHT_HALF);
-
- for (td_u16 y = 0; y < (input_info->input_height + 1) / 2; y++) { /* 2: index */
- if (y == 0) {
- total_offset = 0;
- } else {
- total_offset += last_offset_mdy - first_offset_mdy + bdepth;
- }
-
- first_offset = gmmu_start[y] * input_info->input_bpp / bdepth;
- first_offset_mdy = first_offset / bdepth * bdepth;
- last_offset = cfg_info->line_end - 1 - first_offset;
- last_offset_mdy = last_offset / bdepth * bdepth;
-
- lut_coef = (total_offset << 11) | (first_offset); /* 11: index */
- lut_coef = ((lut_coef << 32) & 0xffffffff00000000) | lut_coef; /* 32: index */
- *(lut_addr + y) = lut_coef;
- }
-
- info.first_offset_align = first_offset_mdy;
- info.last_offset_align = last_offset_mdy;
- info.total_offset = total_offset;
-
- if ((input_info->input_width & 0x1) != 0) { /* odd: for 2 times */
- cfg_info->phy_mem_size = (info.total_offset * 2) + (info.last_offset_align - info.first_offset_align + bdepth);
- } else { /* even: for 2 times */
- cfg_info->phy_mem_size = 2 * (info.total_offset + info.last_offset_align - info.first_offset_align + bdepth);
- }
-
- gmmu_context->gmmu_dfx.lut_vir = cfg_info->lut_vir;
- gmmu_context->gmmu_dfx.lut_size = cfg_info->lut_size;
- gmmu_context->gmmu_dfx.phy_mem_size = cfg_info->phy_mem_size;
-}
-
-static td_void gmmu_product_lut(td_u32 width, td_u32 height, td_u8 offset, td_u16 *gmmu_lut, td_u32 size)
-{
- td_s32 r = (td_s32)((height + 1) / 2);
- td_s32 cx = r;
- td_s32 cy = 0;
- td_s32 df = 1 - r; // error function df(x - 0.5, y + 1) = (x - 0.5) ^ 2 + (y + 1) ^ 2 - r ^ 2
- td_s32 d_e = 3; // increment for x
- td_s32 d_se = -2 * r + 5; // increment for x--
- td_s32 x_center = (td_s32)((width + 1) / 2);
- td_s32 y_center = (td_s32)((height + 1) / 2);
- td_s32 x_pos, y_pos;
-
- uapi_unused(size);
-
- do {
- if (cx != 0) {
- x_pos = x_center - cx;
- y_pos = y_center - cy;
- gmmu_lut[y_pos] = (td_u16)((x_pos >= offset) ? x_pos - offset : 0);
- }
-
- if (cx != cy) {
- x_pos = x_center - cy;
- y_pos = y_center - cx;
- gmmu_lut[y_pos] = (td_u16)((x_pos >= offset) ? x_pos - offset : 0);
- }
-
- if (df < 0) { // y++, x unchanged
- df += d_e;
- d_e += 2; /* 2:algo par */
- d_se += 2; /* 2:algo par */
- } else { // y++, x--
- df += d_se;
- d_e += 2; /* 2:algo par */
- d_se += 4; /* 4:algo par */
- cx--;
- }
- cy++;
- } while (cy <= cx);
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu ioctl
- */
-
-#ifndef DRV_GRAPHICS_GMMU_IOCTL_H
-#define DRV_GRAPHICS_GMMU_IOCTL_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_s32 gmmu_ioctl_config(td_u32 cmd, td_void *arg, td_void *file);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_IOCTL_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu isr
- */
-
-#include "gmmu_isr.h"
-#include "drv_gfx_port.h"
-#include "gmmu_dfx.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-static td_void gmmu_isr_callback(td_u32 param)
-{
- uapi_unused(param);
-
- gmmu_err("gmmu isr err");
- return;
-}
-
-
-td_s32 gmmu_isr_init(td_void)
-{
- td_s32 ret;
-
- ret = osal_irq_request(GMMU_IRQ_NUM, (osal_irq_handler)gmmu_isr_callback, TD_NULL, TD_NULL, TD_NULL);
- if (ret != EXT_SUCCESS) {
- gmmu_err("call osal_irq_request failure");
- return EXT_FAILURE;
- }
-
- return EXT_SUCCESS;
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu isr
- */
-
-#ifndef DRV_GRAPHICS_GMMU_ISR_H
-#define DRV_GRAPHICS_GMMU_ISR_H
-
-#include "td_type.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-td_s32 gmmu_isr_init(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_ISR_H */
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu mem
- */
-
-#include "gmmu_mem.h"
-#include "soc_osal.h"
-
-/*-------------------------------- macro define -------------------------------------------*/
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-/*-------------------------------- par define ---------------------------------------------*/
-
-/*-------------------------------- func release -------------------------------------------*/
-
-td_u32 gmmu_mem_lut_alloc(td_void)
-{
- return GMMU_REG_LUT_ADDR;
-}
-
-td_void* gmmu_mem_small_alloc(td_u32 size)
-{
- return osal_kmalloc(size, OSAL_GFP_KERNEL);
-}
-
-td_void gmmu_mem_small_free(td_void *mem)
-{
- osal_kfree(mem);
-}
+++ /dev/null
-/*
- * Copyright (c) @CompanyNameMagicTag 2021-2021. All rights reserved.
- * Description: gmmu mem
- */
-
-#ifndef DRV_GRAPHICS_GMMU_MEM_H
-#define DRV_GRAPHICS_GMMU_MEM_H
-
-#include "td_type.h"
-#include "gpu_mem_config.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif
-#endif
-
-/*-------------------------------- macro define -------------------------------------------*/
-#define GMMU_SRAM_START GPU_SRAM_START
-#define GMMU_SRAM_SIZE GPU_SRAM_SIZE
-
-#define GMMU_SRAM_VIR_FB0 GPU_SRAM_VIR_FB0
-#define GMMU_SRAM_VIR_FB1 GPU_SRAM_VIR_FB1
-
-#define GMMU_REG_LUT_ADDR GPU_REG_LUT_ADDR
-#define GMMU_REG_LUT_SIZE GPU_REG_LUT_SIZE
-
-#define GMMU_SRAM_CMD_SIZE GPU_SRAM_CMD_SIZE
-
-/*-------------------------------- struct define ------------------------------------------*/
-
-/*-------------------------------- func declares ------------------------------------------*/
-
-td_void* gmmu_mem_small_alloc(td_u32 size);
-td_void gmmu_mem_small_free(td_void *mem);
-td_u32 gmmu_mem_lut_alloc(td_void);
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif
-#endif
-
-#endif /* DRV_GRAPHICS_GMMU_MEM_H */
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