/**\r
- * @file HP4570.c\r
- * @brief This is the source file containing the HP4570 APIs.\r
+ * @file HP4570N.c\r
+ * @brief This is the source file containing the HP4570N APIs.\r
* @author Hypower Applications\r
* @date June 26, 2023\r
*\r
bool safety_mode;\r
bool ntc_hot;\r
bool ntc_cold;\r
-}hp4570_chip_state;\r
+}hp4570n_chip_state;\r
\r
-uint8_t hp4570_i2c_addr = HP4570_I2C_ADDR;\r
+uint8_t hp4570n_i2c_addr = HP4570N_I2C_ADDR;\r
\r
#define SUCCESS 0\r
#define FAIL 1\r
#define INVALID_INPUT 1\r
\r
#if defined(BOARD_L22) || defined(BOARD_FD272)\r
-#define HP4570_I2C_BUS I2C_BUS_0\r
+#define HP4570N_I2C_BUS I2C_BUS_0\r
#elif defined BOARD_U8\r
-#define HP4570_I2C_BUS I2C_BUS_3\r
+#define HP4570N_I2C_BUS I2C_BUS_3\r
#endif\r
-\r
-bool hp4570_write_reg(uint8_t reg, uint8_t value)\r
-{\r
- return custom_i2c_write_reg(hp4570_i2c_addr, reg, 1, &value, 1, HP4570_I2C_BUS);\r
- \r
+static bool hp4570n_write_reg(uint8_t reg, uint8_t value){\r
+ return custom_i2c_write_reg(hp4570n_i2c_addr, reg, 1, &value, 1, HP4570N_I2C_BUS);\r
}\r
\r
-bool hp4570_read_reg(uint8_t reg, uint8_t *value)\r
-{\r
- return custom_i2c_read_regs(hp4570_i2c_addr, reg, 1, value, 1, HP4570_I2C_BUS);\r
+static bool hp4570n_read_reg(uint8_t reg, uint8_t *value){\r
+ return custom_i2c_read_regs(hp4570n_i2c_addr, reg, 1, value, 1, HP4570N_I2C_BUS); \r
}\r
\r
#define INPUT_PARA_FAIL_RETURN(value, min, max) \\r
SET_BIT(value, mask, !en_code, shift); \\r
} while (0)\r
\r
-// Initialize HP4570 chip\r
-bool hp4570_init(uint8_t chip_ver){\r
- custom_i2c_init(HP4570_I2C_BUS);\r
- switch (chip_ver){\r
- case HP4570K:\r
- hp4570_i2c_addr = HP4570_I2C_ADDR;\r
- break;\r
- default:\r
- hp4570_i2c_addr = HP4570_I2C_ADDR;\r
- break;\r
- }\r
- if(hp4570_identify(chip_ver) != SUCCESS)\r
+// Initialize HP4570N chip\r
+bool hp4570n_init(uint8_t chip_ver){\r
+ custom_i2c_init(HP4570N_I2C_BUS);\r
+ // switch (chip_ver){\r
+ // case HP4570NK:\r
+ // hp4570n_i2c_addr = HP4570NK_I2C_ADDR;\r
+ // break;\r
+ // default:\r
+ // hp4570n_i2c_addr = HP4570N_I2C_ADDR;\r
+ // break;\r
+ // }\r
+\r
+ hp4570n_i2c_addr = HP4570N_I2C_ADDR;\r
+\r
+ if(hp4570n_identify(chip_ver) != SUCCESS)\r
{\r
- printf("hp4570_identify(chip_ver) failed !!!! \n");\r
+ printf("hp4570n_identify(chip_ver) failed !!!! \n");\r
return FAIL;\r
}\r
- printf("hp4570_identify(chip_ver) succed !!!! \n");\r
- // hp4570_reg_rst();\r
+ printf("hp4570n_identify(chip_ver) succed !!!! \n");\r
+ // hp4570n_reg_rst();\r
// Add initialization code here, such as configuring registers\r
- hp4570_set_ceb_en(true);\r
+ hp4570n_set_ceb_en(true);\r
+\r
+ // int ret = hp4570n_set_chrg_vbat_mV(4700.0);\r
+ int ret = hp4570n_set_chrg_vbat_mV(4440.0);\r
+ printf("hp4570n_set_chrg_vbat_mV ret:%d\n",ret);\r
+\r
+ ret = hp4570n_set_high_chrg_ipre_mA(30);\r
+ printf("hp4570n_set_high_chrg_ipre_mA(30) ret:%d\n",ret);\r
\r
+ ret = hp4570n_set_low_chrg_ipre_mA(30);\r
+ printf("hp4570n_set_low_chrg_ipre_mA(30) ret:%d\n",ret);\r
\r
- // int ret = hp4570_set_chrg_vbat_mV(4700.0);\r
- int ret = hp4570_set_chrg_vbat_mV(4440.0);\r
- printf("hp4570_set_chrg_vbat_mV ret:%d\n",ret);\r
+ ret = hp4570n_set_chrg_ichg_mA(260);\r
+ printf("hp4570n_set_chrg_ichg_mA(400) ret:%d\n",ret);\r
\r
- ret = hp4570_set_chrg_ipre_mA(30);\r
- printf("hp4570_set_chrg_ipre_mA(30) ret:%d\n",ret);\r
+ ret = hp4570n_set_chrg_iterm_mA(30);\r
+ printf("hp4570n_set_chrg_iterm_mA(30) ret:%d\n",ret);\r
\r
- ret = hp4570_set_chrg_ichg_mA(260);\r
- printf("hp4570_set_chrg_ichg_mA(400) ret:%d\n",ret);\r
+ ret = hp4570n_set_iindpm_mA(1000);\r
+ printf("hp4570n_set_iindpm_mA(1000) ret:%d\n",ret);\r
\r
- ret = hp4570_set_chrg_iterm_mA(30);\r
- printf("hp4570_set_chrg_iterm_mA(30) ret:%d\n",ret);\r
+ ret = hp4570n_set_high_chrg_idead_mA(29);\r
+ printf("hp4570n_set_high_chrg_idead_mA(29) ret:%d\n",ret);\r
\r
- ret = hp4570_set_iindpm_mA(1000);\r
- printf("hp4570_set_iindpm_mA(1000) ret:%d\n",ret);\r
+ ret = hp4570n_set_low_chrg_idead_mA(29);\r
+ printf("hp4570n_set_low_chrg_idead_mA(29) ret:%d\n",ret);\r
+\r
+ hp4570n_set_rst_vsys_wvbus_en(false);\r
\r
- ret = hp4570_set_chrg_idead_mA(29);\r
- printf("hp4570_set_chrg_idead_mA(29) ret:%d\n",ret);\r
- \r
\r
#if 0\r
uint8_t value = 0;\r
- hp4570_read_reg(HP4570_REG_DPM_SET, &value);\r
- printf("HP4570_REG_DPM_SET : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_DPM_SET, &value);\r
+ printf("hp4570n_REG_DPM_SET : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL1, &value);\r
- printf("HP4570_REG_SYS_CTRL1 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL1, &value);\r
+ printf("hp4570n_REG_SYS_CTRL1 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- printf("HP4570_REG_SYS_CTRL0 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL0, &value);\r
+ printf("hp4570n_REG_SYS_CTRL0 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_IDSG_ITERM_SET, &value);\r
- printf("HP4570_REG_IDSG_ITERM_SET : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_IDSG_ITERM_SET, &value);\r
+ printf("hp4570n_REG_IDSG_ITERM_SET : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_BAT_VOL_SET, &value);\r
- printf("HP4570_REG_BAT_VOL_SET : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_BAT_VOL_SET, &value);\r
+ printf("hp4570n_REG_BAT_VOL_SET : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- printf("HP4570_REG_SYS_CTRL3 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL3, &value);\r
+ printf("hp4570n_REG_SYS_CTRL3 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL4, &value);\r
- printf("HP4570_REG_SYS_CTRL4 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL4, &value);\r
+ printf("hp4570n_REG_SYS_CTRL4 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- printf("HP4570_REG_CHIP_STAT0 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_CHIP_STAT0, &value);\r
+ printf("hp4570n_REG_CHIP_STAT0 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT1, &value);\r
- printf("HP4570_REG_CHIP_STAT1 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_CHIP_STAT1, &value);\r
+ printf("hp4570n_REG_CHIP_STAT1 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT2, &value);\r
- printf("HP4570_REG_CHIP_STAT2 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_CHIP_STAT2, &value);\r
+ printf("hp4570n_REG_CHIP_STAT2 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_VIPRE, &value);\r
- printf("HP4570_REG_VIPRE : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_VIPRE, &value);\r
+ printf("hp4570n_REG_VIPRE : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_EXT_CTRL, &value);\r
- printf("HP4570_REG_EXT_CTRL : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_EXT_CTRL, &value);\r
+ printf("hp4570n_REG_EXT_CTRL : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL5, &value);\r
- printf("HP4570_REG_SYS_CTRL5 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL5, &value);\r
+ printf("hp4570n_REG_SYS_CTRL5 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- printf("HP4570_REG_SYS_CTRL6 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL6, &value);\r
+ printf("hp4570n_REG_SYS_CTRL6 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- printf("HP4570_REG_SYS_CTRL7 : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_CTRL7, &value);\r
+ printf("hp4570n_REG_SYS_CTRL7 : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- printf("HP4570_REG_SYS_WAKE_UP_SRC : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_SYS_WAKE_UP_SRC, &value);\r
+ printf("hp4570n_REG_SYS_WAKE_UP_SRC : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_INT0_ENABLE, &value);\r
- printf("HP4570_REG_INT0_ENABLE : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_INT0_ENABLE, &value);\r
+ printf("hp4570n_REG_INT0_ENABLE : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_INT0_STAT, &value);\r
- printf("HP4570_REG_INT0_STAT : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_INT0_STAT, &value);\r
+ printf("hp4570n_REG_INT0_STAT : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_VID_LSB, &value);\r
- printf("HP4570_REG_VID_LSB : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_VID_LSB, &value);\r
+ printf("hp4570n_REG_VID_LSB : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_VID_MSB, &value);\r
- printf("HP4570_REG_VID_MSB : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_VID_MSB, &value);\r
+ printf("hp4570n_REG_VID_MSB : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_PID_LSB, &value);\r
- printf("HP4570_REG_PID_LSB : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_PID_LSB, &value);\r
+ printf("hp4570n_REG_PID_LSB : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_PID_MSB, &value);\r
- printf("HP4570_REG_PID_MSB : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_PID_MSB, &value);\r
+ printf("hp4570n_REG_PID_MSB : 0x%x\n",value);\r
\r
value = 0;\r
- hp4570_read_reg(HP4570_REG_CHIP_VER, &value);\r
- printf("HP4570_REG_CHIP_VER : 0x%x\n",value);\r
+ hp4570n_read_reg(hp4570n_REG_CHIP_VER, &value);\r
+ printf("hp4570n_REG_CHIP_VER : 0x%x\n",value);\r
\r
#endif\r
\r
- // if( hp4570_set_chrg_vbat_mV(4012.5) &&\r
- // hp4570_set_chrg_ipre_mA(34) &&\r
- // hp4570_set_chrg_ichg_mA(200) &&\r
- // hp4570_set_chrg_iterm_mA(34) &&\r
- // hp4570_set_iindpm_mA(1000) &&\r
- // hp4570_set_vin_min_mV(3800))\r
+ // if( hp4570n_set_chrg_vbat_mV(4012.5) &&\r
+ // hp4570n_set_chrg_ipre_mA(34) &&\r
+ // hp4570n_set_chrg_ichg_mA(200) &&\r
+ // hp4570n_set_chrg_iterm_mA(34) &&\r
+ // hp4570n_set_iindpm_mA(1000) &&\r
+ // hp4570n_set_vin_min_mV(3800))\r
return SUCCESS;\r
// return FAIL;\r
+ // if( hp4570n_set_chrg_vbat_mV(4012.5) &&\r
+ // // hp4570n_set_chrg_ipre_mA(34) &&\r
+ // // hp4570n_set_chrg_ichg_mA(200) &&\r
+ // // hp4570n_set_chrg_iterm_mA(34) &&\r
+ // // hp4570n_set_iindpm_mA(1000) &&\r
+ // hp4570n_set_vin_min_mV(3800))\r
+ // return SUCCESS;\r
+ // return FAIL;\r
}\r
\r
-bool hp4570_identify(uint8_t chip_ver){\r
+bool hp4570n_identify(uint8_t chip_ver){\r
uint8_t vid_value[2];\r
uint8_t pid_value[2];\r
uint8_t chip_ver_value;\r
- hp4570_read_reg(HP4570_REG_VID_LSB, &vid_value[0]);\r
- hp4570_read_reg(HP4570_REG_VID_MSB, &vid_value[1]);\r
- hp4570_read_reg(HP4570_REG_PID_LSB, &pid_value[0]);\r
- hp4570_read_reg(HP4570_REG_PID_MSB, &pid_value[1]);\r
- hp4570_read_reg(HP4570_REG_CHIP_VER, &chip_ver_value);\r
+ hp4570n_read_reg(HP4570N_REG_VID_LSB, &vid_value[0]);\r
+ hp4570n_read_reg(HP4570N_REG_VID_MSB, &vid_value[1]);\r
+ hp4570n_read_reg(HP4570N_REG_PID_LSB, &pid_value[0]);\r
+ hp4570n_read_reg(HP4570N_REG_PID_MSB, &pid_value[1]);\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_VER, &chip_ver_value);\r
\r
- // printf("vid_value[0] : 0x%x , vid_value[1] : 0x%x , pid_value[0] : 0x%x,pid_value[1] : 0x%x chip_ver_value : 0x%x\n",vid_value[0],vid_value[1],pid_value[0],pid_value[1],chip_ver_value);\r
+ printf("vid_value[0] : 0x%x , vid_value[1] : 0x%x , pid_value[0] : 0x%x,pid_value[1] : 0x%x chip_ver_value : 0x%x\n",vid_value[0],vid_value[1],pid_value[0],pid_value[1],chip_ver_value);\r
\r
\r
- if((vid_value[0] != HP4570_REG_VID_LSB_DEF) || \r
- (vid_value[1] != HP4570_REG_VID_MSB_DEF) || \r
- (pid_value[0] != HP4570_REG_PID_LSB_DEF)) {\r
+ if((vid_value[0] != HP4570N_REG_VID_LSB_DEF) || \r
+ (vid_value[1] != HP4570N_REG_VID_MSB_DEF) || \r
+ (pid_value[0] != HP4570N_REG_PID_LSB_DEF)) {\r
return FAIL;\r
}\r
\r
return SUCCESS;\r
}\r
\r
-void hp4570_entry_shipmode(void){\r
- hp4570_set_batfet_dis(true);\r
+void hp4570n_entry_shipmode(void){\r
+ hp4570n_set_batfet_dis(true);\r
}\r
\r
-void hp4570_reg_rst(void){\r
+void hp4570n_reg_rst(void){\r
// Write 1 will auto be 0\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL1, HP4570_REG_RST_RESET << HP4570_REG_RST_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL1, HP4570N_REG_RST_RESET << HP4570N_REG_RST_BIT_SHIFT);\r
}\r
\r
-void hp4570_wdt_rst(void){\r
+void hp4570n_wdt_rst(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL1, &value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL1, &value);\r
// Write 1 will auto be 0 and timer will reset,after watchdog fault,Only write 1 will restart timer\r
- SET_BIT(value, HP4570_WDT_RST_MASK, HP4570_WDT_RST_RESET, HP4570_WDT_RST_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL1,value);\r
+ SET_BIT(value, HP4570N_WDT_RST_MASK, HP4570N_WDT_RST_RESET, HP4570N_WDT_RST_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL1,value);\r
}\r
\r
-void hp4570_vsys_rst(void){\r
+void hp4570n_vsys_rst(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL5, &value);\r
- SET_BIT(value, HP4570_VSYS_RST_MASK, HP4570_VSYS_RST_RESET, HP4570_VSYS_RST_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL5,value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL5, &value);\r
+ SET_BIT(value, HP4570N_VSYS_RST_MASK, HP4570N_VSYS_RST_RESET, HP4570N_VSYS_RST_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL5,value);\r
}\r
\r
-bool hp4570_set_vindpm_mV(uint16_t voltage){\r
+bool hp4570n_set_vindpm_mV(uint16_t voltage){\r
uint8_t value;\r
uint8_t vin_min_code;\r
- INPUT_PARA_FAIL_RETURN(voltage,HP4570_VIN_MIN_MIN_mV,HP4570_VIN_MIN_MAX_mV);\r
- hp4570_read_reg(HP4570_REG_DPM_SET, &value);\r
- vin_min_code = (uint8_t)((voltage - HP4570_VIN_MIN_OFFSET_mV)/HP4570_VIN_MIN_STEP_mV);\r
- SET_BIT(value, HP4570_VIN_MIN_MASK, vin_min_code, HP4570_VIN_MIN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_DPM_SET, value);\r
+ INPUT_PARA_FAIL_RETURN(voltage,HP4570N_VIN_MIN_MIN_mV,HP4570N_VIN_MIN_MAX_mV);\r
+ hp4570n_read_reg(HP4570N_REG_DPM_SET, &value);\r
+ vin_min_code = (uint8_t)((voltage - HP4570N_VIN_MIN_OFFSET_mV)/HP4570N_VIN_MIN_STEP_mV);\r
+ SET_BIT(value, HP4570N_VIN_MIN_MASK, vin_min_code, HP4570N_VIN_MIN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_DPM_SET, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_iindpm_mA(uint16_t current){\r
+bool hp4570n_set_iindpm_mA(uint16_t current){\r
uint8_t value;\r
uint8_t iindpm_code;\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_IINDPM_MIN_mA,HP4570_IINDPM_MAX_mA);\r
- hp4570_read_reg(HP4570_REG_DPM_SET, &value);\r
- iindpm_code = (uint8_t)((current - HP4570_IINDPM_OFFSET_mA)/HP4570_IINDPM_STEP_mA);\r
- SET_BIT(value, HP4570_IINDPM_MASK, iindpm_code, HP4570_IINDPM_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_DPM_SET, value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IINDPM_MIN_mA,HP4570N_IINDPM_MAX_mA);\r
+ hp4570n_read_reg(HP4570N_REG_DPM_SET, &value);\r
+ iindpm_code = (uint8_t)((current - HP4570N_IINDPM_OFFSET_mA)/HP4570N_IINDPM_STEP_mA);\r
+ SET_BIT(value, HP4570N_IINDPM_MASK, iindpm_code, HP4570N_IINDPM_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_DPM_SET, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_trst_dgl_mS(uint32_t time){\r
+bool hp4570n_set_trst_dgl_mS(uint32_t time){\r
uint8_t value;\r
uint8_t trst_dgl_code;\r
- INVALID_INPUT_RETURN(time, trst_dgl_code, HP4570_trst_dgl_time, HP4570_NUM_TRST_DGL_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- SET_BIT(value, HP4570_TRST_DGL_MASK, trst_dgl_code, HP4570_TRST_DGL_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL0, value);\r
+ INVALID_INPUT_RETURN(time, trst_dgl_code, HP4570N_trst_dgl_time, HP4570N_NUM_TRST_DGL_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL0, &value);\r
+ SET_BIT(value, HP4570N_TRST_DGL_MASK, trst_dgl_code, HP4570N_TRST_DGL_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL0, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_trst_dur_mS(uint16_t time){\r
+bool hp4570n_set_trst_dur_mS(uint16_t time){\r
uint8_t value;\r
uint8_t trst_dur_code;\r
- INVALID_INPUT_RETURN(time, trst_dur_code, HP4570_trst_dur_time, HP4570_NUM_TRST_DUR_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- SET_BIT(value, HP4570_TRST_DUR_MASK, trst_dur_code, HP4570_TRST_DUR_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL0,value);\r
+ INVALID_INPUT_RETURN(time, trst_dur_code, HP4570N_trst_dur_time, HP4570N_NUM_TRST_DUR_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL0, &value);\r
+ SET_BIT(value, HP4570N_TRST_DUR_MASK, trst_dur_code, HP4570N_TRST_DUR_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL0,value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_hiz_en(bool en){\r
+void hp4570n_set_hiz_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- SET_ENABLE(en, value, HP4570_EN_HIZ_MASK, HP4570_EN_HIZ_ENABLE, HP4570_EN_HIZ_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL0,value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL0, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_HIZ_MASK, HP4570N_EN_HIZ_ENABLE, HP4570N_EN_HIZ_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL0,value);\r
}\r
\r
-void hp4570_set_ceb_en(bool en){\r
+void hp4570n_set_ceb_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- SET_ENABLE(en, value, HP4570_CEB_MASK, HP4570_CEB_ENABLE, HP4570_CEB_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL0, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL0, &value);\r
+ SET_ENABLE(en, value, HP4570N_CEB_MASK, HP4570N_CEB_ENABLE, HP4570N_CEB_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL0, value);\r
}\r
\r
-bool hp4570_set_vbat_uvlo_mV(uint16_t voltage){\r
+bool hp4570n_set_vbat_uvlo_mV(uint16_t voltage){\r
uint8_t value;\r
uint8_t vbat_uvlo_code;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL0, &value);\r
- INPUT_PARA_FAIL_RETURN(voltage,HP4570_VBAT_UVLO_MIN_mV,HP4570_VBAT_UVLO_MAX_mV);\r
- vbat_uvlo_code = (uint8_t)((voltage - HP4570_VBAT_UVLO_OFFSET_mV)/HP4570_VBAT_UVLO_STEP_mV);\r
- SET_BIT(value, HP4570_VBAT_UVLO_MASK, vbat_uvlo_code, HP4570_VBAT_UVLO_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL0, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL0, &value);\r
+ INPUT_PARA_FAIL_RETURN(voltage,HP4570N_VBAT_UVLO_MIN_mV,HP4570N_VBAT_UVLO_MAX_mV);\r
+ vbat_uvlo_code = (uint8_t)((voltage - HP4570N_VBAT_UVLO_OFFSET_mV)/HP4570N_VBAT_UVLO_STEP_mV);\r
+ SET_BIT(value, HP4570N_VBAT_UVLO_MASK, vbat_uvlo_code, HP4570N_VBAT_UVLO_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL0, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_ichg_mA(uint16_t current){\r
+bool hp4570n_set_chrg_ichg_mA(uint16_t current){\r
uint8_t value;\r
uint8_t ichg_code;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL1, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_ICHG_MIN_mA,HP4570_ICHG_MAX_mA);\r
- ichg_code = (uint8_t)((current - HP4570_ICHG_OFFSET_mA)/HP4570_ICHG_STEP_mA);\r
- SET_BIT(value, HP4570_ICHG_MASK, ichg_code, HP4570_ICHG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL1, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL1, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_ICHG_MIN_mA,HP4570N_ICHG_MAX_mA);\r
+ ichg_code = (uint8_t)((current - HP4570N_ICHG_OFFSET_mA)/HP4570N_ICHG_STEP_mA);\r
+ SET_BIT(value, HP4570N_ICHG_MASK, ichg_code, HP4570N_ICHG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL1, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570i_set_chrg_ichg_mA(uint16_t current){\r
+bool hp4570ni_set_chrg_ichg_mA(uint16_t current){\r
uint8_t value;\r
uint8_t ichg_code;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL1, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570I_ICHG_MIN_mA,HP4570I_ICHG_MAX_mA);\r
- ichg_code = (uint8_t)((current - HP4570I_ICHG_OFFSET_mA)/HP4570I_ICHG_STEP_mA);\r
- SET_BIT(value, HP4570_ICHG_MASK, ichg_code, HP4570_ICHG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL1, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL1, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570NI_ICHG_MIN_mA,HP4570NI_ICHG_MAX_mA);\r
+ ichg_code = (uint8_t)((current - HP4570NI_ICHG_OFFSET_mA)/HP4570NI_ICHG_STEP_mA);\r
+ SET_BIT(value, HP4570N_ICHG_MASK, ichg_code, HP4570N_ICHG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL1, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_ibatfet_ocp_mA(uint16_t current){\r
+bool hp4570n_set_high_ibatfet_ocp_mA(uint16_t current){\r
uint8_t value;\r
uint8_t ibatfet_ocp_code;\r
- hp4570_read_reg(HP4570_REG_IDSG_ITERM_SET, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_IBATFET_OCP_MIN_mA,HP4570_IBATFET_OCP_MAX_mA);\r
- ibatfet_ocp_code = (uint8_t)((current - HP4570_IBATFET_OCP_OFFSET_mA)/HP4570_IBATFET_OCP_STEP_mA);\r
- SET_BIT(value, HP4570_IBATFET_OCP_MASK, ibatfet_ocp_code, HP4570_IBATFET_OCP_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_IDSG_ITERM_SET,value);\r
+ hp4570n_set_iterm_2x_en(HP4570N_EN_ITERM_2X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_IDSG_ITERM_SET, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IBATFET_OCP_MIN_mA,HP4570N_IBATFET_OCP_MAX_mA);\r
+ ibatfet_ocp_code = (uint8_t)((current/2 - HP4570N_IBATFET_OCP_OFFSET_mA)/HP4570N_IBATFET_OCP_STEP_mA);\r
+ SET_BIT(value, HP4570N_IBATFET_OCP_MASK, ibatfet_ocp_code, HP4570N_IBATFET_OCP_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_IDSG_ITERM_SET,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_iterm_mA(uint8_t current){\r
+bool hp4570n_set_low_ibatfet_ocp_mA(uint16_t current){\r
+ uint8_t value;\r
+ uint8_t ibatfet_ocp_code;\r
+ hp4570n_set_iterm_2x_en(!HP4570N_EN_ITERM_2X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_IDSG_ITERM_SET, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IBATFET_OCP_MIN_mA,HP4570N_IBATFET_OCP_MAX_mA);\r
+ ibatfet_ocp_code = (uint8_t)((current - HP4570N_IBATFET_OCP_OFFSET_mA)/HP4570N_IBATFET_OCP_STEP_mA);\r
+ SET_BIT(value, HP4570N_IBATFET_OCP_MASK, ibatfet_ocp_code, HP4570N_IBATFET_OCP_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_IDSG_ITERM_SET,value);\r
+ return SUCCESS;\r
+}\r
+\r
+bool hp4570n_set_chrg_iterm_mA(uint8_t current){\r
uint8_t value;\r
uint8_t iterm_code;\r
- hp4570_read_reg(HP4570_REG_IDSG_ITERM_SET, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_ITERM_MIN_mA,HP4570_ITERM_MAX_mA);\r
- iterm_code = (uint8_t)((current - HP4570_ITERM_OFFSET_mA)/HP4570_ITERM_STEP_mA);\r
- SET_BIT(value, HP4570_ITERM_MASK, iterm_code, HP4570_ITERM_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_IDSG_ITERM_SET,value);\r
+ hp4570n_read_reg(HP4570N_REG_IDSG_ITERM_SET, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_ITERM_MIN_mA,HP4570N_ITERM_MAX_mA);\r
+ iterm_code = (uint8_t)((current - HP4570N_ITERM_OFFSET_mA)/HP4570N_ITERM_STEP_mA);\r
+ SET_BIT(value, HP4570N_ITERM_MASK, iterm_code, HP4570N_ITERM_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_IDSG_ITERM_SET,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_vbat_mV(float voltage){\r
+bool hp4570n_set_chrg_vbat_mV(float voltage){\r
uint8_t value;\r
uint8_t vbatreg_code;\r
- hp4570_read_reg(HP4570_REG_BAT_VOL_SET, &value);\r
- INPUT_PARA_FAIL_RETURN(voltage,HP4570_VBATREG_MIN_mV,HP4570_VBATREG_MAX_mV);\r
- vbatreg_code = (uint8_t)((voltage - HP4570_VBATREG_OFFSET_mV)/HP4570_VBATREG_STEP_mV);\r
- SET_BIT(value, HP4570_VBATREG_MASK, vbatreg_code, HP4570_VBATREG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_BAT_VOL_SET,value);\r
+ hp4570n_read_reg(HP4570N_REG_BAT_VOL_SET, &value);\r
+ INPUT_PARA_FAIL_RETURN(voltage,HP4570N_VBATREG_MIN_mV,HP4570N_VBATREG_MAX_mV);\r
+ vbatreg_code = (uint8_t)((voltage - HP4570N_VBATREG_OFFSET_mV)/HP4570N_VBATREG_STEP_mV);\r
+ SET_BIT(value, HP4570N_VBATREG_MASK, vbatreg_code, HP4570N_VBATREG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_BAT_VOL_SET,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_vpre_mV(uint8_t voltage){\r
+bool hp4570n_set_chrg_vpre_mV(uint8_t voltage){\r
uint8_t value0;\r
uint8_t value1;\r
uint8_t vbat_pre_code;\r
- INVALID_INPUT_RETURN(voltage, vbat_pre_code, HP4570_vbat_pre_voltage, HP4570_NUM_VBAT_PRE_VAL);\r
- hp4570_read_reg(HP4570_REG_BAT_VOL_SET, value0);\r
- hp4570_read_reg(HP4570_REG_VIPRE, value1);\r
- SET_BIT(value0, HP4570_VBAT_PRE_0_MASK, (vbat_pre_code & 0x1), HP4570_VBAT_PRE_0_BIT_SHIFT);\r
- SET_BIT(value1, HP4570_VBAT_PRE_1_MASK, (vbat_pre_code & 0x2)>>1, HP4570_VBAT_PRE_1_BIT_SHIFT);\r
- (hp4570_write_reg(HP4570_REG_BAT_VOL_SET,value0) & hp4570_write_reg(HP4570_REG_VIPRE,value1));\r
+ INVALID_INPUT_RETURN(voltage, vbat_pre_code, HP4570N_vbat_pre_voltage, HP4570N_NUM_VBAT_PRE_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_BAT_VOL_SET, value0);\r
+ hp4570n_read_reg(HP4570N_REG_VIPRE, value1);\r
+ SET_BIT(value0, HP4570N_VBAT_PRE_0_MASK, (vbat_pre_code & 0x1), HP4570N_VBAT_PRE_0_BIT_SHIFT);\r
+ SET_BIT(value1, HP4570N_VBAT_PRE_1_MASK, (vbat_pre_code & 0x2)>>1, HP4570N_VBAT_PRE_1_BIT_SHIFT);\r
+ (hp4570n_write_reg(HP4570N_REG_BAT_VOL_SET,value0) & hp4570n_write_reg(HP4570N_REG_VIPRE,value1));\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_vre_mV(uint8_t voltage){\r
+bool hp4570n_set_chrg_vre_mV(uint8_t voltage){\r
uint8_t value;\r
uint8_t vre_chg_code;\r
- INVALID_INPUT_RETURN(voltage, vre_chg_code, HP4570_vre_chg_voltage, HP4570_NUM_VRE_CHG_VAL);\r
- hp4570_read_reg(HP4570_REG_BAT_VOL_SET, &value);\r
- SET_BIT(value, HP4570_VRE_CHG_MASK, vre_chg_code, HP4570_VRE_CHG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_BAT_VOL_SET,value);\r
+ INVALID_INPUT_RETURN(voltage, vre_chg_code, HP4570N_vre_chg_voltage, HP4570N_NUM_VRE_CHG_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_BAT_VOL_SET, &value);\r
+ SET_BIT(value, HP4570N_VRE_CHG_MASK, vre_chg_code, HP4570N_VRE_CHG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_BAT_VOL_SET,value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_wdt_dsg_en(bool en){\r
+void hp4570n_set_wdt_dsg_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_ENABLE(en, value, HP4570_EN_WDT_DSG_MASK, HP4570_EN_WDT_DSG_ENABLE, HP4570_EN_WDT_DSG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_WDT_DSG_MASK, HP4570N_EN_WDT_DSG_ENABLE, HP4570N_EN_WDT_DSG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2, value);\r
}\r
\r
-void hp4570_set_wdt_timer_en(bool en){\r
+void hp4570n_set_wdt_timer_en(bool en){\r
uint8_t value;\r
uint32_t wdt_timer_code;\r
if(!en)\r
- hp4570_set_wdt_timer_mS(HP4570_WDT_TIMER_DIS);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- value &= HP4570_WDT_TIMER_MASK;\r
- if(value >> HP4570_WDT_TIMER_BIT_SHIFT == HP4570_WDT_TIMER_DIS)\r
+ hp4570n_set_wdt_timer_mS(HP4570N_WDT_TIMER_DIS);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ value &= HP4570N_WDT_TIMER_MASK;\r
+ if(value >> HP4570N_WDT_TIMER_BIT_SHIFT == HP4570N_WDT_TIMER_DIS)\r
// do nothing\r
return;\r
- wdt_timer_code = (HP4570_REG_SYS_CTRL2_DEF & HP4570_WDT_TIMER_MASK) >> HP4570_WDT_TIMER_BIT_SHIFT;\r
- SET_BIT(value, HP4570_WDT_TIMER_MASK, wdt_timer_code, HP4570_WDT_TIMER_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2,value);\r
+ wdt_timer_code = (HP4570N_REG_SYS_CTRL2_DEF & HP4570N_WDT_TIMER_MASK) >> HP4570N_WDT_TIMER_BIT_SHIFT;\r
+ SET_BIT(value, HP4570N_WDT_TIMER_MASK, wdt_timer_code, HP4570N_WDT_TIMER_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2,value);\r
}\r
\r
-bool hp4570_set_wdt_timer_mS(uint32_t time){\r
+bool hp4570n_set_wdt_timer_mS(uint32_t time){\r
uint8_t value;\r
uint8_t wdt_timer_code;\r
- INVALID_INPUT_RETURN(time, wdt_timer_code, HP4570_watchdog_time, HP4570_NUM_WDT_TIMER_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_BIT(value, HP4570_WDT_TIMER_MASK, wdt_timer_code, HP4570_WDT_TIMER_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2,value);\r
+ INVALID_INPUT_RETURN(time, wdt_timer_code, HP4570N_watchdog_time, HP4570N_NUM_WDT_TIMER_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_BIT(value, HP4570N_WDT_TIMER_MASK, wdt_timer_code, HP4570N_WDT_TIMER_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2,value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_chrg_term_en(bool en){\r
+void hp4570n_set_chrg_term_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_ENABLE(en, value, HP4570_EN_TERM_MASK, HP4570_EN_TERM_ENABLE, HP4570_EN_TERM_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_TERM_MASK, HP4570N_EN_TERM_ENABLE, HP4570N_EN_TERM_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2, value);\r
}\r
\r
-void hp4570_set_chrg_timer_en(bool en){\r
+void hp4570n_set_chrg_timer_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_ENABLE(en, value, HP4570_EN_TIMER_MASK, HP4570_EN_TIMER_ENABLE, HP4570_EN_TIMER_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_TIMER_MASK, HP4570N_EN_TIMER_ENABLE, HP4570N_EN_TIMER_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2, value);\r
}\r
\r
-bool hp4570_set_chrg_timer_hour(uint8_t time){\r
+bool hp4570n_set_chrg_timer_hour(uint8_t time){\r
uint8_t value;\r
uint8_t chg_timer_code;\r
- INVALID_INPUT_RETURN(time, chg_timer_code, HP4570_fast_chg_time, HP4570_NUM_CHG_TIMER_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_BIT(value, HP4570_CHG_TIMER_MASK, chg_timer_code, HP4570_CHG_TIMER_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2,value);\r
+ INVALID_INPUT_RETURN(time, chg_timer_code, HP4570N_fast_chg_time, HP4570N_NUM_CHG_TIMER_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_BIT(value, HP4570N_CHG_TIMER_MASK, chg_timer_code, HP4570N_CHG_TIMER_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2,value);\r
return SUCCESS;\r
}\r
\r
// when TERM_TMR is enabled, the IC will not suspend the charge current after the charge termination\r
-void hp4570_set_chrg_term_tmr(bool en){\r
+void hp4570n_set_chrg_term_tmr(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL2, &value);\r
- SET_ENABLE(en, value, HP4570_TERM_TMR_MASK, HP4570_TERM_TMR_ENABLE, HP4570_TERM_TMR_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL2, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL2, &value);\r
+ SET_ENABLE(en, value, HP4570N_TERM_TMR_MASK, HP4570N_TERM_TMR_ENABLE, HP4570N_TERM_TMR_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL2, value);\r
}\r
\r
-void hp4570_set_ntc_en(bool en){\r
+void hp4570n_set_ntc_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_NTC_EN_MASK, HP4570_NTC_EN_ENABLE, HP4570_NTC_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_NTC_EN_MASK, HP4570N_NTC_EN_ENABLE, HP4570N_NTC_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
-void hp4570_set_chrg_tmr2x_en(bool en){\r
+void hp4570n_set_chrg_tmr2x_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_TMR2X_EN_MASK, HP4570_TMR2X_EN_ENABLE, HP4570_TMR2X_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_TMR2X_EN_MASK, HP4570N_TMR2X_EN_ENABLE, HP4570N_TMR2X_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
// when set 1, enter ship mode w/o vbus, the bit will be set to 0 after exiting ship mode\r
-bool hp4570_set_batfet_dis(bool en){\r
+bool hp4570n_set_batfet_dis(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_BATFET_DIS_MASK, HP4570_BATFET_DIS_ENABLE, HP4570_BATFET_DIS_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_BATFET_DIS_MASK, HP4570N_BATFET_DIS_ENABLE, HP4570N_BATFET_DIS_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_int_pg_en(bool en){\r
+void hp4570n_set_int_pg_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_PG_INT_CONTROL_MASK, HP4570_PG_INT_CONTROL_ENABLE, HP4570_PG_INT_CONTROL_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_PG_INT_CONTROL_MASK, HP4570N_PG_INT_CONTROL_ENABLE, HP4570N_PG_INT_CONTROL_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
-void hp4570_set_int_chrg_done_en(bool en){\r
+void hp4570n_set_int_chrg_done_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_CHG_DONE_INT_EN_MASK, HP4570_CHG_DONE_INT_EN_ENABLE, HP4570_CHG_DONE_INT_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_CHG_DONE_INT_EN_MASK, HP4570N_CHG_DONE_INT_EN_ENABLE, HP4570N_CHG_DONE_INT_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
// Include: not charge to CC, Pre into CC ,CC into CV, not charge into CC(Auto recharge)\r
-void hp4570_set_int_chrg_stat_en(bool en){\r
+void hp4570n_set_int_chrg_stat_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_CHG_STAT_INT_EN_MASK, HP4570_CHG_STAT_INT_EN_ENABLE, HP4570_CHG_STAT_INT_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_CHG_STAT_INT_EN_MASK, HP4570N_CHG_STAT_INT_EN_ENABLE, HP4570N_CHG_STAT_INT_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
-void hp4570_set_int_ntc_transition_en(bool en){\r
+void hp4570n_set_int_ntc_transition_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_NTC_TRANSITION_EN_MASK, HP4570_NTC_TRANSITION_EN_ENABLE, HP4570_NTC_TRANSITION_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_NTC_TRANSITION_EN_MASK, HP4570N_NTC_TRANSITION_EN_ENABLE, HP4570N_NTC_TRANSITION_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
-void hp4570_set_int_batovp_en(bool en){\r
+void hp4570n_set_int_batovp_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL3, &value);\r
- SET_ENABLE(en, value, HP4570_BATOVP_INT_EN_MASK, HP4570_BATOVP_INT_EN_ENABLE, HP4570_BATOVP_INT_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL3, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL3, &value);\r
+ SET_ENABLE(en, value, HP4570N_BATOVP_INT_EN_MASK, HP4570N_BATOVP_INT_EN_ENABLE, HP4570N_BATOVP_INT_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL3, value);\r
}\r
\r
-void hp4570_set_pcb_otp_en(bool en){\r
+void hp4570n_set_pcb_otp_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL4, &value);\r
- SET_ENABLE(en, value, HP4570_EN_PCB_OTP_MASK, HP4570_EN_PCB_OTP_ENABLE, HP4570_EN_PCB_OTP_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL4, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL4, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_PCB_OTP_MASK, HP4570N_EN_PCB_OTP_ENABLE, HP4570N_EN_PCB_OTP_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL4, value);\r
}\r
\r
-void hp4570_set_vindpm_en(bool en){\r
+void hp4570n_set_vindpm_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL4, &value);\r
- SET_ENABLE(en, value, HP4570_VINDPM_EN_MASK, HP4570_VINDPM_EN_ENABLE, HP4570_VINDPM_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL4, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL4, &value);\r
+ SET_ENABLE(en, value, HP4570N_VINDPM_EN_MASK, HP4570N_VINDPM_EN_ENABLE, HP4570N_VINDPM_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL4, value);\r
}\r
\r
-bool hp4570_set_thermal_reg_degree(uint8_t degree){\r
+bool hp4570n_set_thermal_reg_degree(uint8_t degree){\r
uint8_t value;\r
uint8_t thermal_reg_code;\r
- INVALID_INPUT_RETURN(degree, thermal_reg_code, HP4570_thermal_reg_degree, HP4570_NUM_THERMAL_REG_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL4, &value);\r
- SET_BIT(value, HP4570_THERMAL_REG_MASK, thermal_reg_code, HP4570_THERMAL_REG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL4, value);\r
+ INVALID_INPUT_RETURN(degree, thermal_reg_code, HP4570N_thermal_reg_degree, HP4570N_NUM_THERMAL_REG_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL4, &value);\r
+ SET_BIT(value, HP4570N_THERMAL_REG_MASK, thermal_reg_code, HP4570N_THERMAL_REG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL4, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_vsys_reg_mV(float voltage){\r
+bool hp4570n_set_vsys_reg_mV(float voltage){\r
uint8_t value;\r
uint8_t vsys_reg_code;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL4, &value);\r
- INPUT_PARA_FAIL_RETURN(voltage,HP4570_VSYS_REG_MIN_mV,HP4570_VSYS_REG_MAX_mV);\r
- vsys_reg_code = (uint8_t)((voltage - HP4570_VSYS_REG_OFFSET_mV)/HP4570_VSYS_REG_STEP_mV);\r
- SET_BIT(value, HP4570_VSYS_REG_MASK, vsys_reg_code, HP4570_VSYS_REG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL4,value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL4, &value);\r
+ INPUT_PARA_FAIL_RETURN(voltage,HP4570N_VSYS_REG_MIN_mV,HP4570N_VSYS_REG_MAX_mV);\r
+ vsys_reg_code = (uint8_t)((voltage - HP4570N_VSYS_REG_OFFSET_mV)/HP4570N_VSYS_REG_STEP_mV);\r
+ SET_BIT(value, HP4570N_VSYS_REG_MASK, vsys_reg_code, HP4570N_VSYS_REG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL4,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_ship_dgl_mS(uint16_t time){\r
+bool hp4570n_set_ship_dgl_mS(uint16_t time){\r
uint8_t value;\r
uint8_t ship_dgl_code;\r
- INVALID_INPUT_RETURN(time, ship_dgl_code, HP4570_ship_dgl_time, HP4570_NUM_SHIP_DGL_VAL);\r
- SET_BIT(value, HP4570_SHIP_DGL_MASK, ship_dgl_code, HP4570_SHIP_DGL_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_CHIP_STAT1, value);\r
+ INVALID_INPUT_RETURN(time, ship_dgl_code, HP4570N_ship_dgl_time, HP4570N_NUM_SHIP_DGL_VAL);\r
+ SET_BIT(value, HP4570N_SHIP_DGL_MASK, ship_dgl_code, HP4570N_SHIP_DGL_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_CHIP_STAT1, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_vin_exit_ship_tset_mS(uint16_t time){\r
+bool hp4570n_set_vin_exit_ship_tset_mS(uint16_t time){\r
uint8_t value;\r
uint8_t in_exit_ship_tset_code;\r
- INVALID_INPUT_RETURN(time, in_exit_ship_tset_code, HP4570_ship_dgl_time, HP4570_NUM_IN_EXIT_SHIP_TSET_VAL);\r
- hp4570_read_reg(HP4570_REG_VIPRE, &value);\r
- SET_BIT(value, HP4570_IN_EXIT_SHIP_TSET_MASK, in_exit_ship_tset_code, HP4570_IN_EXIT_SHIP_TSET_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_VIPRE, value);\r
+ INVALID_INPUT_RETURN(time, in_exit_ship_tset_code, HP4570N_ship_dgl_time, HP4570N_NUM_IN_EXIT_SHIP_TSET_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_VIPRE, &value);\r
+ SET_BIT(value, HP4570N_IN_EXIT_SHIP_TSET_MASK, in_exit_ship_tset_code, HP4570N_IN_EXIT_SHIP_TSET_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_VIPRE, value);\r
+ return SUCCESS;\r
+}\r
+\r
+bool hp4570n_set_low_chrg_ipre_mA(uint16_t current){\r
+ uint8_t value;\r
+ uint8_t ipre_code;\r
+ hp4570n_set_ipre_4x_en(!HP4570N_EN_IPRE_4X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_VIPRE, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IPRE_MIN_mA,HP4570N_IPRE_MAX_mA);\r
+ ipre_code = (uint8_t)((current - HP4570N_IPRE_OFFSET_mA)/HP4570N_IPRE_STEP_mA);\r
+ SET_BIT(value, HP4570N_IPRE_MASK, ipre_code, HP4570N_IPRE_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_VIPRE,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_ipre_mA(uint16_t current){\r
+bool hp4570n_set_high_chrg_ipre_mA(uint16_t current){\r
uint8_t value;\r
uint8_t ipre_code;\r
- hp4570_read_reg(HP4570_REG_VIPRE, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_IPRE_MIN_mA,HP4570_IPRE_MAX_mA);\r
- ipre_code = (uint8_t)((current - HP4570_IPRE_OFFSET_mA)/HP4570_IPRE_STEP_mA);\r
- SET_BIT(value, HP4570_IPRE_MASK, ipre_code, HP4570_IPRE_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_VIPRE,value);\r
+ hp4570n_set_ipre_4x_en(HP4570N_EN_IPRE_4X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_VIPRE, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IPRE_MIN_mA,HP4570N_IPRE_MAX_mA);\r
+ ipre_code = (uint8_t)((current/4 - HP4570N_IPRE_OFFSET_mA)/HP4570N_IPRE_STEP_mA);\r
+ SET_BIT(value, HP4570N_IPRE_MASK, ipre_code, HP4570N_IPRE_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_VIPRE,value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_rst_vin_entry_en(bool en){\r
+void hp4570n_set_rst_vin_entry_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_EXT_CTRL, &value);\r
- SET_ENABLE(en, value, HP4570_VINDPM_EN_MASK, HP4570_VIN_ENTRY_RST_EN_ENABLE, HP4570_VIN_ENTRY_RST_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_EXT_CTRL, value);\r
+ hp4570n_read_reg(HP4570N_REG_EXT_CTRL, &value);\r
+ SET_ENABLE(en, value, HP4570N_VINDPM_EN_MASK, HP4570N_VIN_ENTRY_RST_EN_ENABLE, HP4570N_VIN_ENTRY_RST_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_EXT_CTRL, value);\r
+}\r
+\r
+bool hp4570n_set_high_chrg_idead_mA(uint16_t current){\r
+ uint8_t value;\r
+ uint8_t ideadbat_code;\r
+ hp4570n_set_ideadbat_4x_en(HP4570N_EN_IDEADBAT_4X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_EXT_CTRL, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IDEADBAT_MIN_mA,HP4570N_IDEADBAT_MAX_mA);\r
+ ideadbat_code = (uint8_t)((current/4 - HP4570N_IDEADBAT_OFFSET_mA)/HP4570N_IDEADBAT_STEP_mA);\r
+ SET_BIT(value, HP4570N_IDEADBAT_MASK, ideadbat_code, HP4570N_IDEADBAT_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_EXT_CTRL,value);\r
+ return SUCCESS;\r
}\r
\r
-bool hp4570_set_chrg_idead_mA(uint16_t current){\r
+bool hp4570n_set_low_chrg_idead_mA(uint16_t current){\r
uint8_t value;\r
uint8_t ideadbat_code;\r
- hp4570_read_reg(HP4570_REG_EXT_CTRL, &value);\r
- INPUT_PARA_FAIL_RETURN(current,HP4570_IDEADBAT_MIN_mA,HP4570_IDEADBAT_MAX_mA);\r
- ideadbat_code = (uint8_t)((current - HP4570_IDEADBAT_OFFSET_mA)/HP4570_IDEADBAT_STEP_mA);\r
- SET_BIT(value, HP4570_IDEADBAT_MASK, ideadbat_code, HP4570_IDEADBAT_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_EXT_CTRL,value);\r
+ hp4570n_set_ideadbat_4x_en(!HP4570N_EN_IDEADBAT_4X_ENABLE);\r
+ hp4570n_read_reg(HP4570N_REG_EXT_CTRL, &value);\r
+ INPUT_PARA_FAIL_RETURN(current,HP4570N_IDEADBAT_MIN_mA,HP4570N_IDEADBAT_MAX_mA);\r
+ ideadbat_code = (uint8_t)((current - HP4570N_IDEADBAT_OFFSET_mA)/HP4570N_IDEADBAT_STEP_mA);\r
+ SET_BIT(value, HP4570N_IDEADBAT_MASK, ideadbat_code, HP4570N_IDEADBAT_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_EXT_CTRL,value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_en_iindpm_en(bool en){\r
+bool hp4570n_set_en_iindpm_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_EXT_CTRL, &value);\r
- SET_ENABLE(en, value, HP4570_EN_IINDPM_MASK, HP4570_EN_IINDPM_ENABLE, HP4570_EN_IINDPM_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL5, value);\r
+ hp4570n_read_reg(HP4570N_REG_EXT_CTRL, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_IINDPM_MASK, HP4570N_EN_IINDPM_ENABLE, HP4570N_EN_IINDPM_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL5, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_key_wk_time_mS(uint16_t time){\r
+bool hp4570n_set_key_wk_time_mS(uint16_t time){\r
uint8_t value;\r
uint8_t key_wk_set_code;\r
- INVALID_INPUT_RETURN(time, key_wk_set_code, HP4570_key_wk_set_time, HP4570_NUM_KEY_WK_SET_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL5, &value);\r
- SET_BIT(value, HP4570_KEY_WK_SET_MASK, key_wk_set_code, HP4570_KEY_WK_SET_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL5, value);\r
+ INVALID_INPUT_RETURN(time, key_wk_set_code, HP4570N_key_wk_set_time, HP4570N_NUM_KEY_WK_SET_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL5, &value);\r
+ SET_BIT(value, HP4570N_KEY_WK_SET_MASK, key_wk_set_code, HP4570N_KEY_WK_SET_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL5, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_t_hiccup_mS(uint16_t time){\r
+bool hp4570n_set_t_hiccup_mS(uint16_t time){\r
uint8_t value;\r
uint8_t t_hiccup_code;\r
- INVALID_INPUT_RETURN(time, t_hiccup_code, HP4570_key_wk_set_time, HP4570_NUM_T_HICCUP_VAL);\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL5, &value);\r
- SET_BIT(value, HP4570_T_HICCUP_MASK, t_hiccup_code, HP4570_T_HICCUP_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL5, value);\r
+ INVALID_INPUT_RETURN(time, t_hiccup_code, HP4570N_key_wk_set_time, HP4570N_NUM_T_HICCUP_VAL);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL5, &value);\r
+ SET_BIT(value, HP4570N_T_HICCUP_MASK, t_hiccup_code, HP4570N_T_HICCUP_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL5, value);\r
return SUCCESS;\r
}\r
\r
-void hp4570_set_wdt_vsys_rst_en(bool en){\r
+void hp4570n_set_wdt_vsys_rst_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- SET_ENABLE(en, value, HP4570_WDT_VSYS_RST_MASK, HP4570_WDT_VSYS_RST_ENABLE, HP4570_WDT_VSYS_RST_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL6, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL6, &value);\r
+ SET_ENABLE(en, value, HP4570N_WDT_VSYS_RST_MASK, HP4570N_WDT_VSYS_RST_ENABLE, HP4570N_WDT_VSYS_RST_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL6, value);\r
}\r
\r
-void hp4570_set_ship_dgl_en(bool en){\r
+void hp4570n_set_ship_dgl_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- SET_ENABLE(en, value, HP4570_EN_SHIP_DGL_MASK, HP4570_EN_SHIP_DGL_ENABLE, HP4570_EN_SHIP_DGL_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL6, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL6, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_SHIP_DGL_MASK, HP4570N_EN_SHIP_DGL_ENABLE, HP4570N_EN_SHIP_DGL_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL6, value);\r
}\r
\r
-void hp4570_set_wdt_chg_en(bool en){\r
+void hp4570n_set_wdt_chg_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- SET_ENABLE(en, value, HP4570_EN_WDT_CHG_MASK, HP4570_EN_WDT_CHG_ENABLE, HP4570_EN_WDT_CHG_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_WDT_CHG_MASK, HP4570N_EN_WDT_CHG_ENABLE, HP4570N_EN_WDT_CHG_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-void hp4570_set_rst_pwrkey_en(bool en){\r
+void hp4570n_set_rst_pwrkey_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- SET_ENABLE(en, value, HP4570_EN_PWRKEY_RST_MASK, HP4570_EN_PWRKEY_RST_ENABLE, HP4570_EN_PWRKEY_RST_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_PWRKEY_RST_MASK, HP4570N_EN_PWRKEY_RST_ENABLE, HP4570N_EN_PWRKEY_RST_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-void hp4570_set_rst_vsys_wvbus_en(bool en){\r
+void hp4570n_set_rst_vsys_wvbus_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- SET_ENABLE(en, value, HP4570_VSYS_RST_WVBUS_MASK, HP4570_VSYS_RST_WVBUS_ENABLE, HP4570_VSYS_RST_WVBUS_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
+ SET_ENABLE(en, value, HP4570N_VSYS_RST_WVBUS_MASK, HP4570N_VSYS_RST_WVBUS_ENABLE, HP4570N_VSYS_RST_WVBUS_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-void hp4570_set_pwrkey_en(bool en){\r
+void hp4570n_set_pwrkey_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- SET_ENABLE(en, value, HP4570_PWRKEY_EN_MASK, HP4570_PWRKEY_EN_ENABLE, HP4570_PWRKEY_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
+ SET_ENABLE(en, value, HP4570N_PWRKEY_EN_MASK, HP4570N_PWRKEY_EN_ENABLE, HP4570N_PWRKEY_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-void hp4570_set_vbus_wk_en(bool en){\r
+void hp4570n_set_vbus_wk_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
- SET_ENABLE(en, value, HP4570_VBUS_WK_EN_MASK, HP4570_VBUS_WK_EN_ENABLE, HP4570_VBUS_WK_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
+ SET_ENABLE(en, value, HP4570N_VBUS_WK_EN_MASK, HP4570N_VBUS_WK_EN_ENABLE, HP4570N_VBUS_WK_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-void hp4570_set_pwrkey_wk_en(bool en){\r
+void hp4570n_set_pwrkey_wk_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL7, &value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL7, &value);\r
if(en){\r
- SET_BIT(value, HP4570_PWRKEY_WK_EN_MASK, HP4570_PWRKEY_WK_EN_ENABLE, HP4570_PWRKEY_WK_EN_BIT_SHIFT);\r
+ SET_BIT(value, HP4570N_PWRKEY_WK_EN_MASK, HP4570N_PWRKEY_WK_EN_ENABLE, HP4570N_PWRKEY_WK_EN_BIT_SHIFT);\r
// Note: bit 2 must be 1\r
- value |= (HP4570_PWRKEY_EN_ENABLE << HP4570_PWRKEY_EN_BIT_SHIFT);\r
+ value |= (HP4570N_PWRKEY_EN_ENABLE << HP4570N_PWRKEY_EN_BIT_SHIFT);\r
}else\r
- SET_BIT(value, HP4570_PWRKEY_WK_EN_MASK, !HP4570_PWRKEY_WK_EN_ENABLE, HP4570_PWRKEY_WK_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL7, value);\r
+ SET_BIT(value, HP4570N_PWRKEY_WK_EN_MASK, !HP4570N_PWRKEY_WK_EN_ENABLE, HP4570N_PWRKEY_WK_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL7, value);\r
}\r
\r
-bool hp4570_set_watchdog_int_enable(bool en){\r
+bool hp4570n_set_watchdog_int_enable(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_INT0_ENABLE, &value);\r
- SET_ENABLE(en, value, HP4570_WATCHDOG_INT_EN_MASK, HP4570_WATCHDOG_INT_EN_ENABLE, HP4570_WATCHDOG_INT_EN_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_INT0_ENABLE, value);\r
+ hp4570n_read_reg(HP4570N_REG_INT0_ENABLE, &value);\r
+ SET_ENABLE(en, value, HP4570N_WATCHDOG_INT_EN_MASK, HP4570N_WATCHDOG_INT_EN_ENABLE, HP4570N_WATCHDOG_INT_EN_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_INT0_ENABLE, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_set_chg_safety_expired_enable(bool en){\r
+bool hp4570n_set_chg_safety_expired_enable(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_INT0_ENABLE, &value);\r
- SET_ENABLE(en, value, HP4570_CHG_SAFETY_EXPIRED_MASK, HP4570_CHG_SAFETY_EXPIRED_ENABLE, HP4570_CHG_SAFETY_EXPIRED_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_INT0_ENABLE, value);\r
+ hp4570n_read_reg(HP4570N_REG_INT0_ENABLE, &value);\r
+ SET_ENABLE(en, value, HP4570N_CHG_SAFETY_EXPIRED_MASK, HP4570N_CHG_SAFETY_EXPIRED_ENABLE, HP4570N_CHG_SAFETY_EXPIRED_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_INT0_ENABLE, value);\r
return SUCCESS;\r
}\r
\r
-bool hp4570_read_status_wdt_fault(void){\r
+bool hp4570n_read_status_wdt_fault(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return (value & HP4570_WDT_FAULT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return (value & HP4570N_WDT_FAULT_MASK) ? true : false;\r
}\r
\r
-bool hp4570_read_chrg_stat_not_chrg(void){\r
+bool hp4570n_read_chrg_stat_not_chrg(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return ((value & HP4570_CHRG_STAT_MASK) == HP4570_CHRG_STAT_NOT_CHRG) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return ((value & HP4570N_CHRG_STAT_MASK) == HP4570N_CHRG_STAT_NOT_CHRG) ? true : false;\r
}\r
\r
-bool hp4570_read_chrg_stat_dead_chrg(void){\r
+bool hp4570n_read_chrg_stat_dead_chrg(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return ((value & HP4570_CHRG_STAT_MASK) == HP4570_CHRG_STAT_DEAD_CHRG) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return ((value & HP4570N_CHRG_STAT_MASK) == HP4570N_CHRG_STAT_DEAD_CHRG) ? true : false;\r
}\r
\r
-bool hp4570_read_chrg_stat_pre_chrg(void){\r
+bool hp4570n_read_chrg_stat_pre_chrg(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return ((value & HP4570_CHRG_STAT_MASK) == HP4570_CHRG_STAT_PRE_CHRG) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return ((value & HP4570N_CHRG_STAT_MASK) == HP4570N_CHRG_STAT_PRE_CHRG) ? true : false;\r
}\r
\r
-bool hp4570_read_chrg_stat_fast_chrg(void){\r
+bool hp4570n_read_chrg_stat_fast_chrg(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return ((value & HP4570_CHRG_STAT_MASK) == HP4570_CHRG_STAT_FAST_CHRG) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return ((value & HP4570N_CHRG_STAT_MASK) == HP4570N_CHRG_STAT_FAST_CHRG) ? true : false;\r
}\r
\r
-bool hp4570_read_chrg_stat_chrg_done(void){\r
+bool hp4570n_read_chrg_stat_chrg_done(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return ((value & HP4570_CHRG_STAT_MASK) == HP4570_CHRG_STAT_CHRG_DONE) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return ((value & HP4570N_CHRG_STAT_MASK) == HP4570N_CHRG_STAT_CHRG_DONE) ? true : false;\r
}\r
\r
-bool hp4570_read_status_vindpm(void){\r
+bool hp4570n_read_status_vindpm(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return (value & HP4570_VIN_DPM_STAT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return (value & HP4570N_VIN_DPM_STAT_MASK) ? true : false;\r
}\r
\r
-bool hp4570_read_status_vbus_pg(void){\r
+bool hp4570n_read_status_vbus_pg(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return (value & HP4570_VBUS_PG_STAT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return (value & HP4570N_VBUS_PG_STAT_MASK) ? true : false;\r
}\r
\r
-bool hp4570_read_status_thermal(void){\r
+bool hp4570n_read_status_thermal(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT0, &value);\r
- return (value & HP4570_THERM_STAT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT0, &value);\r
+ return (value & HP4570N_THERM_STAT_MASK) ? true : false;\r
}\r
\r
-void hp4570_update_status_chip_stat1(void){\r
+void hp4570n_update_status_chip_stat1(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT1, &value);\r
- if(value & HP4570_VIN_FAULT_MASK)\r
- hp4570_chip_state.vin_fault |= true;\r
- if(value & HP4570_TSHUT_MASK)\r
- hp4570_chip_state.tshut |= true;\r
- if(value & HP4570_VBAT_OVP_MASK)\r
- hp4570_chip_state.vbat_ovp |= true;\r
- if(value & HP4570_SAFETY_MODE_MASK)\r
- hp4570_chip_state.safety_mode |= true;\r
- hp4570_chip_state.ntc_hot = (value & HP4570_NTC_HOT_MASK) ? true : false;\r
- hp4570_chip_state.ntc_cold = (value & HP4570_NTC_COLD_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT1, &value);\r
+ if(value & HP4570N_VIN_FAULT_MASK)\r
+ hp4570n_chip_state.vin_fault |= true;\r
+ if(value & HP4570N_TSHUT_MASK)\r
+ hp4570n_chip_state.tshut |= true;\r
+ if(value & HP4570N_VBAT_OVP_MASK)\r
+ hp4570n_chip_state.vbat_ovp |= true;\r
+ if(value & HP4570N_SAFETY_MODE_MASK)\r
+ hp4570n_chip_state.safety_mode |= true;\r
+ hp4570n_chip_state.ntc_hot = (value & HP4570N_NTC_HOT_MASK) ? true : false;\r
+ hp4570n_chip_state.ntc_cold = (value & HP4570N_NTC_COLD_MASK) ? true : false;\r
}\r
\r
-void hp4570_clear_status_chip_stat1(void){\r
- hp4570_chip_state.vin_fault = false;\r
- hp4570_chip_state.tshut = false;\r
- hp4570_chip_state.vbat_ovp = false;\r
- hp4570_chip_state.safety_mode = false;\r
+void hp4570n_clear_status_chip_stat1(void){\r
+ hp4570n_chip_state.vin_fault = false;\r
+ hp4570n_chip_state.tshut = false;\r
+ hp4570n_chip_state.vbat_ovp = false;\r
+ hp4570n_chip_state.safety_mode = false;\r
}\r
\r
-bool hp4570_read_status_vin_fault(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.vin_fault;\r
+bool hp4570n_read_status_vin_fault(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.vin_fault;\r
}\r
\r
-bool hp4570_read_status_tshut(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.tshut;\r
+bool hp4570n_read_status_tshut(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.tshut;\r
}\r
\r
-bool hp4570_read_status_vbat_ovp(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.vbat_ovp;\r
+bool hp4570n_read_status_vbat_ovp(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.vbat_ovp;\r
}\r
\r
-bool hp4570_read_status_safety_mode(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.safety_mode;\r
+bool hp4570n_read_status_safety_mode(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.safety_mode;\r
}\r
\r
-bool hp4570_read_status_ntc_hot(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.ntc_hot;\r
+bool hp4570n_read_status_ntc_hot(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.ntc_hot;\r
}\r
\r
-bool hp4570_read_status_ntc_cold(void){\r
- hp4570_update_status_chip_stat1();\r
- return hp4570_chip_state.ntc_cold;\r
+bool hp4570n_read_status_ntc_cold(void){\r
+ hp4570n_update_status_chip_stat1();\r
+ return hp4570n_chip_state.ntc_cold;\r
}\r
\r
-bool hp4570_read_status_iindpm(void){\r
+bool hp4570n_read_status_iindpm(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_CHIP_STAT2, &value);\r
- return (value & HP4570_IIN_DPM_STAT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_CHIP_STAT2, &value);\r
+ return (value & HP4570N_IIN_DPM_STAT_MASK) ? true : false;\r
}\r
\r
-bool hp4570_read_status_vin_entry_rst(void){\r
+bool hp4570n_read_status_vin_entry_rst(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- if(value & HP4570_ENTRY_RST_STAT_MASK){\r
- hp4570_write_reg(HP4570_REG_SYS_WAKE_UP_SRC,HP4570_ENTRY_RST_STAT_MASK);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_WAKE_UP_SRC, &value);\r
+ if(value & HP4570N_ENTRY_RST_STAT_MASK){\r
+ hp4570n_write_reg(HP4570N_REG_SYS_WAKE_UP_SRC,HP4570N_ENTRY_RST_STAT_MASK);\r
return true;\r
}\r
return false;\r
}\r
\r
-bool hp4570_read_status_pwrkey_rst(void){\r
+bool hp4570n_read_status_pwrkey_rst(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- if(value & HP4570_PWRKEY_RST_STAT_MASK){\r
- hp4570_write_reg(HP4570_REG_SYS_WAKE_UP_SRC,HP4570_PWRKEY_RST_STAT_MASK);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_WAKE_UP_SRC, &value);\r
+ if(value & HP4570N_PWRKEY_RST_STAT_MASK){\r
+ hp4570n_write_reg(HP4570N_REG_SYS_WAKE_UP_SRC,HP4570N_PWRKEY_RST_STAT_MASK);\r
return true;\r
}\r
return false;\r
}\r
\r
-bool hp4570_read_status_hiccup_latch(void){\r
+bool hp4570n_read_status_hiccup_latch(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- if(value & HP4570_HICCUP_LATCH_STAT_MASK){\r
- hp4570_write_reg(HP4570_REG_SYS_WAKE_UP_SRC,HP4570_HICCUP_LATCH_STAT_MASK);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_WAKE_UP_SRC, &value);\r
+ if(value & HP4570N_HICCUP_LATCH_STAT_MASK){\r
+ hp4570n_write_reg(HP4570N_REG_SYS_WAKE_UP_SRC,HP4570N_HICCUP_LATCH_STAT_MASK);\r
return true;\r
}\r
return false;\r
}\r
\r
-bool hp4570_read_status_pwrkey_wk(void){\r
+bool hp4570n_read_status_pwrkey_wk(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- if(value & HP4570_PWRKEY_WK_MASK){\r
- hp4570_write_reg(HP4570_REG_SYS_WAKE_UP_SRC,HP4570_PWRKEY_WK_MASK);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_WAKE_UP_SRC, &value);\r
+ if(value & HP4570N_PWRKEY_WK_MASK){\r
+ hp4570n_write_reg(HP4570N_REG_SYS_WAKE_UP_SRC,HP4570N_PWRKEY_WK_MASK);\r
return true;\r
}\r
return false;\r
}\r
\r
-bool hp4570_read_status_vbus_wk(void){\r
+bool hp4570n_read_status_vbus_wk(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_WAKE_UP_SRC, &value);\r
- if(value & HP4570_VBUS_WK_MASK){\r
- hp4570_write_reg(HP4570_REG_SYS_WAKE_UP_SRC,HP4570_VBUS_WK_MASK);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_WAKE_UP_SRC, &value);\r
+ if(value & HP4570N_VBUS_WK_MASK){\r
+ hp4570n_write_reg(HP4570N_REG_SYS_WAKE_UP_SRC,HP4570N_VBUS_WK_MASK);\r
return true;\r
}\r
return false;\r
}\r
\r
-bool hp4570_read_status_watchdog_int(void){\r
+bool hp4570n_read_status_watchdog_int(void){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_INT0_STAT, &value);\r
- return (value & HP4570_WATCHDOG_INT_MASK) ? true : false;\r
+ hp4570n_read_reg(HP4570N_REG_INT0_STAT, &value);\r
+ return (value & HP4570N_WATCHDOG_INT_MASK) ? true : false;\r
}\r
\r
-void hp4570_set_iterm_2x_en(bool en){\r
+void hp4570n_set_iterm_2x_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- SET_ENABLE(en, value, HP4570_EN_ITERM_2X_MASK,HP4570_EN_ITERM_2X_ENABLE,HP4570_EN_ITERM_2X_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL6, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL6, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_ITERM_2X_MASK,HP4570N_EN_ITERM_2X_ENABLE,HP4570N_EN_ITERM_2X_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL6, value);\r
}\r
\r
-void hp4570_set_ipre_4x_en(bool en){\r
+void hp4570n_set_ipre_4x_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- SET_ENABLE(en, value, HP4570_EN_IPRE_4X_MASK,HP4570_EN_IPRE_4X_ENABLE,HP4570_EN_IPRE_4X_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL6, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL6, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_IPRE_4X_MASK,HP4570N_EN_IPRE_4X_ENABLE,HP4570N_EN_IPRE_4X_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL6, value);\r
}\r
\r
-void hp4570_set_ideadbat_4x_en(bool en){\r
+void hp4570n_set_ideadbat_4x_en(bool en){\r
uint8_t value;\r
- hp4570_read_reg(HP4570_REG_SYS_CTRL6, &value);\r
- SET_ENABLE(en, value, HP4570_EN_IDEADBAT_4X_MASK,HP4570_EN_IDEADBAT_4X_ENABLE,HP4570_EN_IDEADBAT_4X_BIT_SHIFT);\r
- hp4570_write_reg(HP4570_REG_SYS_CTRL6, value);\r
+ hp4570n_read_reg(HP4570N_REG_SYS_CTRL6, &value);\r
+ SET_ENABLE(en, value, HP4570N_EN_IDEADBAT_4X_MASK,HP4570N_EN_IDEADBAT_4X_ENABLE,HP4570N_EN_IDEADBAT_4X_BIT_SHIFT);\r
+ hp4570n_write_reg(HP4570N_REG_SYS_CTRL6, value);\r
}\r
\r
-uint8_t hp4570_get_id(void)\r
+uint8_t hp4570n_get_id(void)\r
{\r
uint8_t id = 0;\r
- if(hp4570_identify(HP4570N) == SUCCESS)\r
+ if(hp4570n_identify(HP4570N) == SUCCESS)\r
id = 0x2;\r
return id;\r
}
\ No newline at end of file
/**\r
- * @file HP4570-H.h\r
- * @brief This is the header file containing the HP4570 I2C Settings and Control.\r
- Includes API for computations related to configuring HP4570 Registers\r
- and Functions to Control the HP4570 Family IC.\r
+ * @file HP4570N-H.h\r
+ * @brief This is the header file containing the HP4570N I2C Settings and Control.\r
+ Includes API for computations related to configuring HP4570N Registers\r
+ and Functions to Control the HP4570N Family IC.\r
* @author Hypower Applications\r
* @date October 14, 2024\r
*\r
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
*/\r
\r
-#ifndef HP4570_CHARGER_H\r
-#define HP4570_CHARGER_H\r
+#ifndef HP4570N_CHARGER_H\r
+#define HP4570N_CHARGER_H\r
\r
#include <stdint.h>\r
#include <stdbool.h>\r
\r
// for example\r
// Avoid using "X", x stands for General Condition\r
-enum HP4570_chip_ver {\r
+enum hp4570n_chip_ver {\r
HP4570A,// all default, package typeA\r
HP4570B,// all default, package typeB\r
HP4570I = 0x0A,// different ichg range and step\r
};\r
\r
// 7-bit Slave Address\r
-#define HP4570_I2C_ADDR 0x07\r
+#define HP4570N_I2C_ADDR 0x07\r
\r
\r
// Register address definitions\r
-#define HP4570_REG_DPM_SET 0x00\r
-#define HP4570_REG_SYS_CTRL0 0x01\r
-#define HP4570_REG_SYS_CTRL1 0x02\r
-#define HP4570_REG_IDSG_ITERM_SET 0x03\r
-#define HP4570_REG_BAT_VOL_SET 0x04\r
-#define HP4570_REG_SYS_CTRL2 0x05\r
-#define HP4570_REG_SYS_CTRL3 0x06\r
-#define HP4570_REG_SYS_CTRL4 0x07\r
-#define HP4570_REG_CHIP_STAT0 0x08\r
-#define HP4570_REG_CHIP_STAT1 0x09\r
-#define HP4570_REG_CHIP_STAT2 0x0B\r
-#define HP4570_REG_VIPRE 0x0C\r
-#define HP4570_REG_EXT_CTRL 0x0D\r
-#define HP4570_REG_SYS_CTRL5 0x15\r
-#define HP4570_REG_SYS_CTRL6 0x19\r
-#define HP4570_REG_SYS_CTRL7 0x1B\r
-#define HP4570_REG_SYS_WAKE_UP_SRC 0x1E\r
-#define HP4570_REG_INT0_ENABLE 0x50\r
-#define HP4570_REG_INT0_STAT 0x58\r
-#define HP4570_REG_VID_LSB 0x60\r
-#define HP4570_REG_VID_MSB 0x61\r
-#define HP4570_REG_PID_LSB 0x62\r
-#define HP4570_REG_PID_MSB 0x63\r
-#define HP4570_REG_CHIP_VER 0x64\r
+#define HP4570N_REG_DPM_SET 0x00\r
+#define HP4570N_REG_SYS_CTRL0 0x01\r
+#define HP4570N_REG_SYS_CTRL1 0x02\r
+#define HP4570N_REG_IDSG_ITERM_SET 0x03\r
+#define HP4570N_REG_BAT_VOL_SET 0x04\r
+#define HP4570N_REG_SYS_CTRL2 0x05\r
+#define HP4570N_REG_SYS_CTRL3 0x06\r
+#define HP4570N_REG_SYS_CTRL4 0x07\r
+#define HP4570N_REG_CHIP_STAT0 0x08\r
+#define HP4570N_REG_CHIP_STAT1 0x09\r
+#define HP4570N_REG_CHIP_STAT2 0x0B\r
+#define HP4570N_REG_VIPRE 0x0C\r
+#define HP4570N_REG_EXT_CTRL 0x0D\r
+#define HP4570N_REG_SYS_CTRL5 0x15\r
+#define HP4570N_REG_SYS_CTRL6 0x19\r
+#define HP4570N_REG_SYS_CTRL7 0x1B\r
+#define HP4570N_REG_SYS_WAKE_UP_SRC 0x1E\r
+#define HP4570N_REG_INT0_ENABLE 0x50\r
+#define HP4570N_REG_INT0_STAT 0x58\r
+#define HP4570N_REG_VID_LSB 0x60\r
+#define HP4570N_REG_VID_MSB 0x61\r
+#define HP4570N_REG_PID_LSB 0x62\r
+#define HP4570N_REG_PID_MSB 0x63\r
+#define HP4570N_REG_CHIP_VER 0x64\r
\r
#ifndef GENMASK\r
#define GENMASK(h, l) (((uint8_t) -1 >> (7 - (h))) & ~((1U << (l)) - 1))\r
#endif\r
\r
-#define HP4570_VIN_MIN_MASK GENMASK(7, 4)\r
-#define HP4570_VIN_MIN_STEP_mV 100\r
-#define HP4570_VIN_MIN_OFFSET_mV 3800\r
-#define HP4570_VIN_MIN_MIN_mV 3800\r
-#define HP4570_VIN_MIN_MAX_mV 4700\r
-#define HP4570_VIN_MIN_BIT_SHIFT 4\r
-\r
-#define HP4570_IINDPM_MASK GENMASK(2, 0)\r
-#define HP4570_IINDPM_STEP_mA 100\r
-#define HP4570_IINDPM_OFFSET_mA 300\r
-#define HP4570_IINDPM_MIN_mA 300\r
-#define HP4570_IINDPM_MAX_mA 1000\r
-#define HP4570_IINDPM_BIT_SHIFT 0\r
-\r
-#define HP4570_NUM_TRST_DGL_VAL 4\r
-#define HP4570_TRST_DGL_MASK GENMASK(7, 6)\r
-#define HP4570_TRST_DGL_BIT_SHIFT 6\r
-\r
-#define HP4570_NUM_TRST_DUR_VAL 2\r
-#define HP4570_TRST_DUR_MASK BIT(5)\r
-#define HP4570_TRST_DUR_BIT_SHIFT 5\r
-\r
-#define HP4570_EN_HIZ_MASK BIT(4)\r
-#define HP4570_EN_HIZ_ENABLE 1\r
-#define HP4570_EN_HIZ_BIT_SHIFT 4\r
-\r
-#define HP4570_CEB_MASK BIT(3)\r
-#define HP4570_CEB_ENABLE 0\r
-#define HP4570_CEB_BIT_SHIFT 3\r
-\r
-#define HP4570_VBAT_UVLO_MASK GENMASK(2, 0)\r
-#define HP4570_VBAT_UVLO_STEP_mV 100\r
-#define HP4570_VBAT_UVLO_OFFSET_mV 2400\r
-#define HP4570_VBAT_UVLO_MIN_mV 2400\r
-#define HP4570_VBAT_UVLO_MAX_mV 3100\r
-#define HP4570_VBAT_UVLO_DEF_mV 2800\r
-#define HP4570_VBAT_UVLO_BIT_SHIFT 0\r
-\r
-#define HP4570_REG_RST_MASK BIT(7)\r
-#define HP4570_REG_RST_RESET 1\r
-#define HP4570_REG_RST_BIT_SHIFT 7\r
-\r
-#define HP4570_WDT_RST_MASK BIT(6)\r
-#define HP4570_WDT_RST_RESET 1\r
-#define HP4570_WDT_RST_BIT_SHIFT 6\r
-\r
-#define HP4570_ICHG_MASK GENMASK(5, 0)\r
-#define HP4570_ICHG_STEP_mA 8\r
-#define HP4570_ICHG_OFFSET_mA 8\r
-#define HP4570_ICHG_MIN_mA 8\r
-#define HP4570_ICHG_MAX_mA 512\r
-#define HP4570I_ICHG_STEP_mA 8\r
-#define HP4570I_ICHG_OFFSET_mA 8\r
-#define HP4570I_ICHG_MIN_mA 8\r
-#define HP4570I_ICHG_MAX_mA 512\r
-#define HP4570_ICHG_BIT_SHIFT 0\r
-\r
-#define HP4570_IBATFET_OCP_MASK GENMASK(7, 4)\r
-#define HP4570_IBATFET_OCP_STEP_mA 200\r
-#define HP4570_IBATFET_OCP_OFFSET_mA 200\r
-#define HP4570_IBATFET_OCP_MIN_mA 200\r
-#define HP4570_IBATFET_OCP_MAX_mA 3200\r
-#define HP4570_IBATFET_OCP_BIT_SHIFT 4\r
-\r
-#define HP4570_ITERM_MASK GENMASK(3, 0)\r
-#define HP4570_ITERM_STEP_mA 2\r
-#define HP4570_ITERM_OFFSET_mA 1\r
-#define HP4570_ITERM_MIN_mA 1\r
-#define HP4570_ITERM_MAX_mA 31\r
-#define HP4570_ITERM_BIT_SHIFT 0\r
-\r
-#define HP4570_VBATREG_MASK GENMASK(7, 2)\r
-#define HP4570_VBATREG_STEP_mV 10\r
-#define HP4570_VBATREG_OFFSET_mV 4040\r
-#define HP4570_VBATREG_MIN_mV 4040\r
-#define HP4570_VBATREG_MAX_mV 4670\r
-#define HP4570_VBATREG_BIT_SHIFT 2\r
-\r
-#define HP4570_NUM_VBAT_PRE_VAL 4\r
-#define HP4570_VBAT_PRE_0_MASK BIT(1)\r
-#define HP4570_VBAT_PRE_1_MASK BIT(4)\r
-#define HP4570_VBAT_PRE_0_BIT_SHIFT 1\r
-#define HP4570_VBAT_PRE_1_BIT_SHIFT 4\r
-\r
-#define HP4570_NUM_VRE_CHG_VAL 2\r
-#define HP4570_VRE_CHG_MASK BIT(0)\r
-#define HP4570_VRE_CHG_BIT_SHIFT 0\r
-\r
-#define HP4570_EN_WDT_DSG_MASK BIT(7)\r
-#define HP4570_EN_WDT_DSG_ENABLE 1\r
-#define HP4570_EN_WDT_DSG_BIT_SHIFT 7\r
-\r
-#define HP4570_NUM_WDT_TIMER_VAL 4\r
-#define HP4570_WDT_TIMER_MASK GENMASK(6, 5)\r
-#define HP4570_WDT_TIMER_DIS 0\r
-#define HP4570_WDT_TIMER_BIT_SHIFT 5\r
-\r
-#define HP4570_EN_TERM_MASK BIT(4)\r
-#define HP4570_EN_TERM_ENABLE 1\r
-#define HP4570_EN_TERM_BIT_SHIFT 4\r
-\r
-#define HP4570_EN_TIMER_MASK BIT(3)\r
-#define HP4570_EN_TIMER_ENABLE 1\r
-#define HP4570_EN_TIMER_BIT_SHIFT 3\r
-\r
-#define HP4570_NUM_CHG_TIMER_VAL 4\r
-#define HP4570_CHG_TIMER_MASK GENMASK(2, 1)\r
-#define HP4570_CHG_TIMER_BIT_SHIFT 1\r
-\r
-#define HP4570_TERM_TMR_MASK BIT(0)\r
-#define HP4570_TERM_TMR_ENABLE 1\r
-#define HP4570_TERM_TMR_BIT_SHIFT 0\r
-\r
-#define HP4570_NTC_EN_MASK BIT(7)\r
-#define HP4570_NTC_EN_ENABLE 1\r
-#define HP4570_NTC_EN_BIT_SHIFT 7\r
-\r
-#define HP4570_TMR2X_EN_MASK BIT(6)\r
-#define HP4570_TMR2X_EN_ENABLE 1\r
-#define HP4570_TMR2X_EN_BIT_SHIFT 6\r
-\r
-#define HP4570_BATFET_DIS_MASK BIT(5)\r
-#define HP4570_BATFET_DIS_ENABLE 1\r
-#define HP4570_BATFET_DIS_BIT_SHIFT 5\r
-\r
-#define HP4570_PG_INT_CONTROL_MASK BIT(4)\r
-#define HP4570_PG_INT_CONTROL_ENABLE 0\r
-#define HP4570_PG_INT_CONTROL_BIT_SHIFT 4\r
-\r
-#define HP4570_CHG_DONE_INT_EN_MASK BIT(3)\r
-#define HP4570_CHG_DONE_INT_EN_ENABLE 0\r
-#define HP4570_CHG_DONE_INT_EN_BIT_SHIFT 3\r
-\r
-#define HP4570_CHG_STAT_INT_EN_MASK BIT(2)\r
-#define HP4570_CHG_STAT_INT_EN_ENABLE 0\r
-#define HP4570_CHG_STAT_INT_EN_BIT_SHIFT 2\r
-\r
-#define HP4570_NTC_TRANSITION_EN_MASK BIT(1)\r
-#define HP4570_NTC_TRANSITION_EN_ENABLE 0\r
-#define HP4570_NTC_TRANSITION_EN_BIT_SHIFT 1\r
-\r
-#define HP4570_BATOVP_INT_EN_MASK BIT(0)\r
-#define HP4570_BATOVP_INT_EN_ENABLE 0\r
-#define HP4570_BATOVP_INT_EN_BIT_SHIFT 0\r
-\r
-#define HP4570_EN_PCB_OTP_MASK BIT(7)\r
-#define HP4570_EN_PCB_OTP_ENABLE 0\r
-#define HP4570_EN_PCB_OTP_BIT_SHIFT 7\r
-\r
-#define HP4570_VINDPM_EN_MASK BIT(6)\r
-#define HP4570_VINDPM_EN_ENABLE 1\r
-#define HP4570_VINDPM_EN_BIT_SHIFT 6\r
-\r
-#define HP4570_NUM_THERMAL_REG_VAL 4\r
-#define HP4570_THERMAL_REG_MASK GENMASK(5, 4)\r
-#define HP4570_THERMAL_REG_BIT_SHIFT 4\r
-\r
-#define HP4570_VSYS_REG_MASK GENMASK(2, 0)\r
-#define HP4570_VSYS_REG_STEP_mV 100\r
-#define HP4570_VSYS_REG_OFFSET_mV 4250\r
-#define HP4570_VSYS_REG_MIN_mV 4250\r
-#define HP4570_VSYS_REG_MAX_mV 4950\r
-#define HP4570_VSYS_REG_BIT_SHIFT 0\r
-\r
-#define HP4570_CHRG_STAT_MASK GENMASK(5, 3)\r
-#define HP4570_CHRG_STAT_BIT_SHIFT 3\r
-#define HP4570_CHRG_STAT_NOT_CHRG 0\r
-#define HP4570_CHRG_STAT_DEAD_CHRG (BIT(5) | BIT(3))\r
-#define HP4570_CHRG_STAT_PRE_CHRG BIT(3)\r
-#define HP4570_CHRG_STAT_FAST_CHRG BIT(4)\r
-#define HP4570_CHRG_STAT_CHRG_DONE (BIT(4) | BIT(3))\r
-\r
-#define HP4570_WDT_FAULT_MASK BIT(7)\r
-#define HP4570_VIN_DPM_STAT_MASK BIT(2)\r
-#define HP4570_VBUS_PG_STAT_MASK BIT(1)\r
-#define HP4570_THERM_STAT_MASK BIT(0)\r
-\r
-#define HP4570_NUM_SHIP_DGL_VAL 4\r
-#define HP4570_SHIP_DGL_MASK GENMASK(7, 6)\r
-#define HP4570_SHIP_DGL_BIT_SHIFT 6\r
-\r
-#define HP4570_VIN_FAULT_MASK BIT(5)\r
-#define HP4570_TSHUT_MASK BIT(4)\r
-#define HP4570_VBAT_OVP_MASK BIT(3)\r
-#define HP4570_SAFETY_MODE_MASK BIT(2)\r
-#define HP4570_NTC_HOT_MASK BIT(1)\r
-#define HP4570_NTC_COLD_MASK BIT(0)\r
-\r
-#define HP4570_IIN_DPM_STAT_MASK BIT(6)\r
-\r
-#define HP4570_NUM_IN_EXIT_SHIP_TSET_VAL 2\r
-#define HP4570_IN_EXIT_SHIP_TSET_MASK BIT(5)\r
-#define HP4570_IN_EXIT_SHIP_TSET_BIT_SHIFT 5\r
-\r
-#define HP4570_IPRE_MASK GENMASK(3, 0)\r
-#define HP4570_IPRE_STEP_mA 2\r
-#define HP4570_IPRE_OFFSET_mA 1\r
-#define HP4570_IPRE_MIN_mA 1\r
-#define HP4570_IPRE_MAX_mA 31\r
-#define HP4570_IPRE_BIT_SHIFT 0\r
-\r
-#define HP4570_VIN_ENTRY_RST_EN_MASK BIT(4)\r
-#define HP4570_VIN_ENTRY_RST_EN_ENABLE 1\r
-#define HP4570_VIN_ENTRY_RST_EN_BIT_SHIFT 4\r
-\r
-#define HP4570_IDEADBAT_MASK GENMASK(3, 0)\r
-#define HP4570_IDEADBAT_STEP_mA 2\r
-#define HP4570_IDEADBAT_OFFSET_mA 1\r
-#define HP4570_IDEADBAT_MIN_mA 1\r
-#define HP4570_IDEADBAT_MAX_mA 31\r
-#define HP4570_IDEADBAT_BIT_SHIFT 0\r
-\r
-#define HP4570_VSYS_RST_MASK BIT(7)\r
-#define HP4570_VSYS_RST_RESET 1\r
-#define HP4570_VSYS_RST_BIT_SHIFT 7\r
-\r
-#define HP4570_EN_IINDPM_MASK BIT(5)\r
-#define HP4570_EN_IINDPM_ENABLE 1\r
-#define HP4570_EN_IINDPM_BIT_SHIFT 5\r
-\r
-#define HP4570_NUM_KEY_WK_SET_VAL 2\r
-#define HP4570_KEY_WK_SET_MASK BIT(2)\r
-#define HP4570_KEY_WK_SET_BIT_SHIFT 2\r
-\r
-#define HP4570_NUM_T_HICCUP_VAL 2\r
-#define HP4570_T_HICCUP_MASK BIT(0)\r
-#define HP4570_T_HICCUP_BIT_SHIFT 0\r
-\r
-#define HP4570_EN_ITERM_2X_MASK BIT(6)\r
-#define HP4570_EN_ITERM_2X_ENABLE 1\r
-#define HP4570_EN_ITERM_2X_BIT_SHIFT 6\r
-\r
-#define HP4570_EN_IPRE_4X_MASK BIT(5)\r
-#define HP4570_EN_IPRE_4X_ENABLE 1\r
-#define HP4570_EN_IPRE_4X_BIT_SHIFT 5\r
-\r
-#define HP4570_EN_IDEADBAT_4X_MASK BIT(4)\r
-#define HP4570_EN_IDEADBAT_4X_ENABLE 1\r
-#define HP4570_EN_IDEADBAT_4X_BIT_SHIFT 4\r
-\r
-#define HP4570_WDT_VSYS_RST_MASK BIT(3)\r
-#define HP4570_WDT_VSYS_RST_ENABLE 1\r
-#define HP4570_WDT_VSYS_RST_BIT_SHIFT 3\r
-\r
-#define HP4570_EN_SHIP_DGL_MASK BIT(2)\r
-#define HP4570_EN_SHIP_DGL_ENABLE 1\r
-#define HP4570_EN_SHIP_DGL_BIT_SHIFT 2\r
-\r
-#define HP4570_EN_WDT_CHG_MASK BIT(7)\r
-#define HP4570_EN_WDT_CHG_ENABLE 1\r
-#define HP4570_EN_WDT_CHG_BIT_SHIFT 7\r
-\r
-#define HP4570_EN_PWRKEY_RST_MASK BIT(5)\r
-#define HP4570_EN_PWRKEY_RST_ENABLE 1\r
-#define HP4570_EN_PWRKEY_RST_BIT_SHIFT 5\r
-\r
-#define HP4570_VSYS_RST_WVBUS_MASK BIT(4)\r
-#define HP4570_VSYS_RST_WVBUS_ENABLE 1\r
-#define HP4570_VSYS_RST_WVBUS_BIT_SHIFT 4\r
-\r
-#define HP4570_PWRKEY_EN_MASK BIT(2)\r
-#define HP4570_PWRKEY_EN_ENABLE 1\r
-#define HP4570_PWRKEY_EN_BIT_SHIFT 2\r
-\r
-#define HP4570_VBUS_WK_EN_MASK BIT(1)\r
-#define HP4570_VBUS_WK_EN_ENABLE 1\r
-#define HP4570_VBUS_WK_EN_BIT_SHIFT 1\r
-\r
-#define HP4570_PWRKEY_WK_EN_MASK BIT(0)\r
-#define HP4570_PWRKEY_WK_EN_ENABLE 1\r
-#define HP4570_PWRKEY_WK_EN_BIT_SHIFT 0\r
-\r
-#define HP4570_ENTRY_RST_STAT_MASK BIT(7)\r
-#define HP4570_PWRKEY_RST_STAT_MASK BIT(5)\r
-#define HP4570_HICCUP_LATCH_STAT_MASK BIT(4)\r
-#define HP4570_PWRKEY_WK_MASK BIT(1)\r
-#define HP4570_VBUS_WK_MASK BIT(0)\r
-\r
-#define HP4570_WATCHDOG_INT_EN_MASK BIT(7)\r
-#define HP4570_WATCHDOG_INT_EN_ENABLE 0\r
-#define HP4570_WATCHDOG_INT_EN_BIT_SHIFT 7\r
-\r
-#define HP4570_CHG_SAFETY_EXPIRED_MASK BIT(1)\r
-#define HP4570_CHG_SAFETY_EXPIRED_ENABLE 0\r
-#define HP4570_CHG_SAFETY_EXPIRED_BIT_SHIFT 1\r
-\r
-#define HP4570_WATCHDOG_INT_MASK BIT(7)\r
+#define HP4570N_VIN_MIN_MASK GENMASK(7, 4)\r
+#define HP4570N_VIN_MIN_STEP_mV 100\r
+#define HP4570N_VIN_MIN_OFFSET_mV 3800\r
+#define HP4570N_VIN_MIN_MIN_mV 3800\r
+#define HP4570N_VIN_MIN_MAX_mV 4700\r
+#define HP4570N_VIN_MIN_BIT_SHIFT 4\r
+\r
+#define HP4570N_IINDPM_MASK GENMASK(2, 0)\r
+#define HP4570N_IINDPM_STEP_mA 100\r
+#define HP4570N_IINDPM_OFFSET_mA 300\r
+#define HP4570N_IINDPM_MIN_mA 300\r
+#define HP4570N_IINDPM_MAX_mA 1000\r
+#define HP4570N_IINDPM_BIT_SHIFT 0\r
+\r
+#define HP4570N_NUM_TRST_DGL_VAL 4\r
+#define HP4570N_TRST_DGL_MASK GENMASK(7, 6)\r
+#define HP4570N_TRST_DGL_BIT_SHIFT 6\r
+\r
+#define HP4570N_NUM_TRST_DUR_VAL 2\r
+#define HP4570N_TRST_DUR_MASK BIT(5)\r
+#define HP4570N_TRST_DUR_BIT_SHIFT 5\r
+\r
+#define HP4570N_EN_HIZ_MASK BIT(4)\r
+#define HP4570N_EN_HIZ_ENABLE 1\r
+#define HP4570N_EN_HIZ_BIT_SHIFT 4\r
+\r
+#define HP4570N_CEB_MASK BIT(3)\r
+#define HP4570N_CEB_ENABLE 0\r
+#define HP4570N_CEB_BIT_SHIFT 3\r
+\r
+#define HP4570N_VBAT_UVLO_MASK GENMASK(2, 0)\r
+#define HP4570N_VBAT_UVLO_STEP_mV 100\r
+#define HP4570N_VBAT_UVLO_OFFSET_mV 2400\r
+#define HP4570N_VBAT_UVLO_MIN_mV 2400\r
+#define HP4570N_VBAT_UVLO_MAX_mV 3100\r
+#define HP4570N_VBAT_UVLO_DEF_mV 2800\r
+#define HP4570N_VBAT_UVLO_BIT_SHIFT 0\r
+\r
+#define HP4570N_REG_RST_MASK BIT(7)\r
+#define HP4570N_REG_RST_RESET 1\r
+#define HP4570N_REG_RST_BIT_SHIFT 7\r
+\r
+#define HP4570N_WDT_RST_MASK BIT(6)\r
+#define HP4570N_WDT_RST_RESET 1\r
+#define HP4570N_WDT_RST_BIT_SHIFT 6\r
+\r
+#define HP4570N_ICHG_MASK GENMASK(5, 0)\r
+#define HP4570N_ICHG_STEP_mA 8\r
+#define HP4570N_ICHG_OFFSET_mA 8\r
+#define HP4570N_ICHG_MIN_mA 8\r
+#define HP4570N_ICHG_MAX_mA 512\r
+#define HP4570NI_ICHG_STEP_mA 8\r
+#define HP4570NI_ICHG_OFFSET_mA 8\r
+#define HP4570NI_ICHG_MIN_mA 8\r
+#define HP4570NI_ICHG_MAX_mA 512\r
+#define HP4570N_ICHG_BIT_SHIFT 0\r
+\r
+#define HP4570N_IBATFET_OCP_MASK GENMASK(7, 4)\r
+#define HP4570N_IBATFET_OCP_STEP_mA 200\r
+#define HP4570N_IBATFET_OCP_OFFSET_mA 200\r
+#define HP4570N_IBATFET_OCP_MIN_mA 200\r
+#define HP4570N_IBATFET_OCP_MAX_mA 3200\r
+#define HP4570N_IBATFET_OCP_BIT_SHIFT 4\r
+\r
+#define HP4570N_ITERM_MASK GENMASK(3, 0)\r
+#define HP4570N_ITERM_STEP_mA 2\r
+#define HP4570N_ITERM_OFFSET_mA 1\r
+#define HP4570N_ITERM_MIN_mA 1\r
+#define HP4570N_ITERM_MAX_mA 31\r
+#define HP4570N_ITERM_BIT_SHIFT 0\r
+\r
+#define HP4570N_VBATREG_MASK GENMASK(7, 2)\r
+#define HP4570N_VBATREG_STEP_mV 10\r
+#define HP4570N_VBATREG_OFFSET_mV 4040\r
+#define HP4570N_VBATREG_MIN_mV 4040\r
+#define HP4570N_VBATREG_MAX_mV 4670\r
+#define HP4570N_VBATREG_BIT_SHIFT 2\r
+\r
+#define HP4570N_NUM_VBAT_PRE_VAL 4\r
+#define HP4570N_VBAT_PRE_0_MASK BIT(1)\r
+#define HP4570N_VBAT_PRE_1_MASK BIT(4)\r
+#define HP4570N_VBAT_PRE_0_BIT_SHIFT 1\r
+#define HP4570N_VBAT_PRE_1_BIT_SHIFT 4\r
+\r
+#define HP4570N_NUM_VRE_CHG_VAL 2\r
+#define HP4570N_VRE_CHG_MASK BIT(0)\r
+#define HP4570N_VRE_CHG_BIT_SHIFT 0\r
+\r
+#define HP4570N_EN_WDT_DSG_MASK BIT(7)\r
+#define HP4570N_EN_WDT_DSG_ENABLE 1\r
+#define HP4570N_EN_WDT_DSG_BIT_SHIFT 7\r
+\r
+#define HP4570N_NUM_WDT_TIMER_VAL 4\r
+#define HP4570N_WDT_TIMER_MASK GENMASK(6, 5)\r
+#define HP4570N_WDT_TIMER_DIS 0\r
+#define HP4570N_WDT_TIMER_BIT_SHIFT 5\r
+\r
+#define HP4570N_EN_TERM_MASK BIT(4)\r
+#define HP4570N_EN_TERM_ENABLE 1\r
+#define HP4570N_EN_TERM_BIT_SHIFT 4\r
+\r
+#define HP4570N_EN_TIMER_MASK BIT(3)\r
+#define HP4570N_EN_TIMER_ENABLE 1\r
+#define HP4570N_EN_TIMER_BIT_SHIFT 3\r
+\r
+#define HP4570N_NUM_CHG_TIMER_VAL 4\r
+#define HP4570N_CHG_TIMER_MASK GENMASK(2, 1)\r
+#define HP4570N_CHG_TIMER_BIT_SHIFT 1\r
+\r
+#define HP4570N_TERM_TMR_MASK BIT(0)\r
+#define HP4570N_TERM_TMR_ENABLE 1\r
+#define HP4570N_TERM_TMR_BIT_SHIFT 0\r
+\r
+#define HP4570N_NTC_EN_MASK BIT(7)\r
+#define HP4570N_NTC_EN_ENABLE 1\r
+#define HP4570N_NTC_EN_BIT_SHIFT 7\r
+\r
+#define HP4570N_TMR2X_EN_MASK BIT(6)\r
+#define HP4570N_TMR2X_EN_ENABLE 1\r
+#define HP4570N_TMR2X_EN_BIT_SHIFT 6\r
+\r
+#define HP4570N_BATFET_DIS_MASK BIT(5)\r
+#define HP4570N_BATFET_DIS_ENABLE 1\r
+#define HP4570N_BATFET_DIS_BIT_SHIFT 5\r
+\r
+#define HP4570N_PG_INT_CONTROL_MASK BIT(4)\r
+#define HP4570N_PG_INT_CONTROL_ENABLE 0\r
+#define HP4570N_PG_INT_CONTROL_BIT_SHIFT 4\r
+\r
+#define HP4570N_CHG_DONE_INT_EN_MASK BIT(3)\r
+#define HP4570N_CHG_DONE_INT_EN_ENABLE 0\r
+#define HP4570N_CHG_DONE_INT_EN_BIT_SHIFT 3\r
+\r
+#define HP4570N_CHG_STAT_INT_EN_MASK BIT(2)\r
+#define HP4570N_CHG_STAT_INT_EN_ENABLE 0\r
+#define HP4570N_CHG_STAT_INT_EN_BIT_SHIFT 2\r
+\r
+#define HP4570N_NTC_TRANSITION_EN_MASK BIT(1)\r
+#define HP4570N_NTC_TRANSITION_EN_ENABLE 0\r
+#define HP4570N_NTC_TRANSITION_EN_BIT_SHIFT 1\r
+\r
+#define HP4570N_BATOVP_INT_EN_MASK BIT(0)\r
+#define HP4570N_BATOVP_INT_EN_ENABLE 0\r
+#define HP4570N_BATOVP_INT_EN_BIT_SHIFT 0\r
+\r
+#define HP4570N_EN_PCB_OTP_MASK BIT(7)\r
+#define HP4570N_EN_PCB_OTP_ENABLE 0\r
+#define HP4570N_EN_PCB_OTP_BIT_SHIFT 7\r
+\r
+#define HP4570N_VINDPM_EN_MASK BIT(6)\r
+#define HP4570N_VINDPM_EN_ENABLE 1\r
+#define HP4570N_VINDPM_EN_BIT_SHIFT 6\r
+\r
+#define HP4570N_NUM_THERMAL_REG_VAL 4\r
+#define HP4570N_THERMAL_REG_MASK GENMASK(5, 4)\r
+#define HP4570N_THERMAL_REG_BIT_SHIFT 4\r
+\r
+#define HP4570N_VSYS_REG_MASK GENMASK(2, 0)\r
+#define HP4570N_VSYS_REG_STEP_mV 100\r
+#define HP4570N_VSYS_REG_OFFSET_mV 4250\r
+#define HP4570N_VSYS_REG_MIN_mV 4250\r
+#define HP4570N_VSYS_REG_MAX_mV 4950\r
+#define HP4570N_VSYS_REG_BIT_SHIFT 0\r
+\r
+#define HP4570N_CHRG_STAT_MASK GENMASK(5, 3)\r
+#define HP4570N_CHRG_STAT_BIT_SHIFT 3\r
+#define HP4570N_CHRG_STAT_NOT_CHRG 0\r
+#define HP4570N_CHRG_STAT_DEAD_CHRG (BIT(5) | BIT(3))\r
+#define HP4570N_CHRG_STAT_PRE_CHRG BIT(3)\r
+#define HP4570N_CHRG_STAT_FAST_CHRG BIT(4)\r
+#define HP4570N_CHRG_STAT_CHRG_DONE (BIT(4) | BIT(3))\r
+\r
+#define HP4570N_WDT_FAULT_MASK BIT(7)\r
+#define HP4570N_VIN_DPM_STAT_MASK BIT(2)\r
+#define HP4570N_VBUS_PG_STAT_MASK BIT(1)\r
+#define HP4570N_THERM_STAT_MASK BIT(0)\r
+\r
+#define HP4570N_NUM_SHIP_DGL_VAL 4\r
+#define HP4570N_SHIP_DGL_MASK GENMASK(7, 6)\r
+#define HP4570N_SHIP_DGL_BIT_SHIFT 6\r
+\r
+#define HP4570N_VIN_FAULT_MASK BIT(5)\r
+#define HP4570N_TSHUT_MASK BIT(4)\r
+#define HP4570N_VBAT_OVP_MASK BIT(3)\r
+#define HP4570N_SAFETY_MODE_MASK BIT(2)\r
+#define HP4570N_NTC_HOT_MASK BIT(1)\r
+#define HP4570N_NTC_COLD_MASK BIT(0)\r
+\r
+#define HP4570N_IIN_DPM_STAT_MASK BIT(6)\r
+\r
+#define HP4570N_NUM_IN_EXIT_SHIP_TSET_VAL 2\r
+#define HP4570N_IN_EXIT_SHIP_TSET_MASK BIT(5)\r
+#define HP4570N_IN_EXIT_SHIP_TSET_BIT_SHIFT 5\r
+\r
+#define HP4570N_IPRE_MASK GENMASK(3, 0)\r
+#define HP4570N_IPRE_STEP_mA 2\r
+#define HP4570N_IPRE_OFFSET_mA 1\r
+#define HP4570N_IPRE_MIN_mA 1\r
+#define HP4570N_IPRE_MAX_mA 31\r
+#define HP4570N_IPRE_BIT_SHIFT 0\r
+\r
+#define HP4570N_VIN_ENTRY_RST_EN_MASK BIT(4)\r
+#define HP4570N_VIN_ENTRY_RST_EN_ENABLE 1\r
+#define HP4570N_VIN_ENTRY_RST_EN_BIT_SHIFT 4\r
+\r
+#define HP4570N_IDEADBAT_MASK GENMASK(3, 0)\r
+#define HP4570N_IDEADBAT_STEP_mA 2\r
+#define HP4570N_IDEADBAT_OFFSET_mA 1\r
+#define HP4570N_IDEADBAT_MIN_mA 1\r
+#define HP4570N_IDEADBAT_MAX_mA 31\r
+#define HP4570N_IDEADBAT_BIT_SHIFT 0\r
+\r
+#define HP4570N_VSYS_RST_MASK BIT(7)\r
+#define HP4570N_VSYS_RST_RESET 1\r
+#define HP4570N_VSYS_RST_BIT_SHIFT 7\r
+\r
+#define HP4570N_EN_IINDPM_MASK BIT(5)\r
+#define HP4570N_EN_IINDPM_ENABLE 1\r
+#define HP4570N_EN_IINDPM_BIT_SHIFT 5\r
+\r
+#define HP4570N_NUM_KEY_WK_SET_VAL 2\r
+#define HP4570N_KEY_WK_SET_MASK BIT(2)\r
+#define HP4570N_KEY_WK_SET_BIT_SHIFT 2\r
+\r
+#define HP4570N_NUM_T_HICCUP_VAL 2\r
+#define HP4570N_T_HICCUP_MASK BIT(0)\r
+#define HP4570N_T_HICCUP_BIT_SHIFT 0\r
+\r
+#define HP4570N_EN_ITERM_2X_MASK BIT(6)\r
+#define HP4570N_EN_ITERM_2X_ENABLE 1\r
+#define HP4570N_EN_ITERM_2X_BIT_SHIFT 6\r
+\r
+#define HP4570N_EN_IPRE_4X_MASK BIT(5)\r
+#define HP4570N_EN_IPRE_4X_ENABLE 1\r
+#define HP4570N_EN_IPRE_4X_BIT_SHIFT 5\r
+\r
+#define HP4570N_EN_IDEADBAT_4X_MASK BIT(4)\r
+#define HP4570N_EN_IDEADBAT_4X_ENABLE 1\r
+#define HP4570N_EN_IDEADBAT_4X_BIT_SHIFT 4\r
+\r
+#define HP4570N_WDT_VSYS_RST_MASK BIT(3)\r
+#define HP4570N_WDT_VSYS_RST_ENABLE 1\r
+#define HP4570N_WDT_VSYS_RST_BIT_SHIFT 3\r
+\r
+#define HP4570N_EN_SHIP_DGL_MASK BIT(2)\r
+#define HP4570N_EN_SHIP_DGL_ENABLE 1\r
+#define HP4570N_EN_SHIP_DGL_BIT_SHIFT 2\r
+\r
+#define HP4570N_EN_WDT_CHG_MASK BIT(7)\r
+#define HP4570N_EN_WDT_CHG_ENABLE 1\r
+#define HP4570N_EN_WDT_CHG_BIT_SHIFT 7\r
+\r
+#define HP4570N_EN_PWRKEY_RST_MASK BIT(5)\r
+#define HP4570N_EN_PWRKEY_RST_ENABLE 1\r
+#define HP4570N_EN_PWRKEY_RST_BIT_SHIFT 5\r
+\r
+#define HP4570N_VSYS_RST_WVBUS_MASK BIT(4)\r
+#define HP4570N_VSYS_RST_WVBUS_ENABLE 1\r
+#define HP4570N_VSYS_RST_WVBUS_BIT_SHIFT 4\r
+\r
+#define HP4570N_PWRKEY_EN_MASK BIT(2)\r
+#define HP4570N_PWRKEY_EN_ENABLE 1\r
+#define HP4570N_PWRKEY_EN_BIT_SHIFT 2\r
+\r
+#define HP4570N_VBUS_WK_EN_MASK BIT(1)\r
+#define HP4570N_VBUS_WK_EN_ENABLE 1\r
+#define HP4570N_VBUS_WK_EN_BIT_SHIFT 1\r
+\r
+#define HP4570N_PWRKEY_WK_EN_MASK BIT(0)\r
+#define HP4570N_PWRKEY_WK_EN_ENABLE 1\r
+#define HP4570N_PWRKEY_WK_EN_BIT_SHIFT 0\r
+\r
+#define HP4570N_ENTRY_RST_STAT_MASK BIT(7)\r
+#define HP4570N_PWRKEY_RST_STAT_MASK BIT(5)\r
+#define HP4570N_HICCUP_LATCH_STAT_MASK BIT(4)\r
+#define HP4570N_PWRKEY_WK_MASK BIT(1)\r
+#define HP4570N_VBUS_WK_MASK BIT(0)\r
+\r
+#define HP4570N_WATCHDOG_INT_EN_MASK BIT(7)\r
+#define HP4570N_WATCHDOG_INT_EN_ENABLE 0\r
+#define HP4570N_WATCHDOG_INT_EN_BIT_SHIFT 7\r
+\r
+#define HP4570N_CHG_SAFETY_EXPIRED_MASK BIT(1)\r
+#define HP4570N_CHG_SAFETY_EXPIRED_ENABLE 0\r
+#define HP4570N_CHG_SAFETY_EXPIRED_BIT_SHIFT 1\r
+\r
+#define HP4570N_WATCHDOG_INT_MASK BIT(7)\r
\r
-static const uint32_t HP4570_trst_dgl_time[HP4570_NUM_TRST_DGL_VAL] = {\r
+static const uint32_t HP4570N_trst_dgl_time[HP4570N_NUM_TRST_DGL_VAL] = {\r
80000, 120000, 160000, 200000\r
};\r
-static const uint16_t HP4570_trst_dur_time[HP4570_NUM_TRST_DUR_VAL] = {\r
+static const uint16_t HP4570N_trst_dur_time[HP4570N_NUM_TRST_DUR_VAL] = {\r
2000, 4000\r
};\r
-static const uint16_t HP4570_vbat_pre_voltage[HP4570_NUM_VBAT_PRE_VAL] = {\r
+static const uint16_t HP4570N_vbat_pre_voltage[HP4570N_NUM_VBAT_PRE_VAL] = {\r
2800, 3000, 3200, 3300\r
};\r
-static const uint8_t HP4570_vre_chg_voltage[HP4570_NUM_VRE_CHG_VAL] = {\r
+static const uint8_t HP4570N_vre_chg_voltage[HP4570N_NUM_VRE_CHG_VAL] = {\r
100, 200\r
};\r
-static const uint32_t HP4570_watchdog_time[HP4570_NUM_WDT_TIMER_VAL] = {\r
+static const uint32_t HP4570N_watchdog_time[HP4570N_NUM_WDT_TIMER_VAL] = {\r
0, 40000, 80000, 160000\r
};\r
-static const uint8_t HP4570_fast_chg_time[HP4570_NUM_CHG_TIMER_VAL] = {\r
+static const uint8_t HP4570N_fast_chg_time[HP4570N_NUM_CHG_TIMER_VAL] = {\r
3, 5, 8, 12\r
};\r
-static const uint8_t HP4570_thermal_reg_degree[HP4570_NUM_THERMAL_REG_VAL] = {\r
+static const uint8_t HP4570N_thermal_reg_degree[HP4570N_NUM_THERMAL_REG_VAL] = {\r
80, 100, 120, 130\r
};\r
-static const uint16_t HP4570_ship_dgl_time[HP4570_NUM_SHIP_DGL_VAL] = {\r
+static const uint16_t HP4570N_ship_dgl_time[HP4570N_NUM_SHIP_DGL_VAL] = {\r
1000, 2000, 4000, 8000\r
};\r
-static const uint16_t HP4570_in_exit_ship_tset_time[HP4570_NUM_IN_EXIT_SHIP_TSET_VAL] = {\r
+static const uint16_t HP4570N_in_exit_ship_tset_time[HP4570N_NUM_IN_EXIT_SHIP_TSET_VAL] = {\r
50, 2000\r
};\r
-static const uint16_t HP4570_key_wk_set_time[HP4570_NUM_KEY_WK_SET_VAL] = {\r
+static const uint16_t HP4570N_key_wk_set_time[HP4570N_NUM_KEY_WK_SET_VAL] = {\r
2000, 200\r
};\r
-static const uint16_t HP4570_t_hiccup_time[HP4570_NUM_T_HICCUP_VAL] = {\r
+static const uint16_t HP4570N_t_hiccup_time[HP4570N_NUM_T_HICCUP_VAL] = {\r
256, 512\r
};\r
\r
//Default value for a register.\r
-#define HP4570_REG_DPM_SET_DEF 0x84\r
-#define HP4570_REG_SYS_CTRL0_DEF 0xA4\r
-#define HP4570_REG_SYS_CTRL1_DEF 0x00\r
-#define HP4570_REG_IDSG_ITERM_SET_DEF 0x91\r
-#define HP4570_REG_BAT_VOL_SET_DEF 0x43\r
-#define HP4570_REG_SYS_CTRL2_DEF 0x3A\r
-#define HP4570_REG_SYS_CTRL3_DEF 0x40\r
-#define HP4570_REG_SYS_CTRL4_DEF 0x24\r
-#define HP4570_REG_CHIP_STAT1_DEF 0x00\r
-#define HP4570_REG_VIPRE_DEF 0x01\r
-#define HP4570_REG_EXT_CTRL_DEF 0x11\r
-#define HP4570_REG_SYS_CTRL5_DEF 0x21\r
-#define HP4570_REG_SYS_CTRL6_DEF 0x0C\r
-#define HP4570_REG_SYS_CTRL7_DEF 0xB6\r
-#define HP4570_REG_INT0_ENABLE_DEF 0x00\r
-#define HP4570_REG_INT0_STAT_DEF 0x00\r
-#define HP4570_REG_VID_LSB_DEF 0xC6\r
-#define HP4570_REG_VID_MSB_DEF 0x34\r
-#define HP4570_REG_PID_LSB_DEF 0x81\r
-#define HP4570_REG_PID_MSB_DEF 0x00\r
-\r
-#define HP4570J_REG_SYS_CTRL0_DEF 0xAC\r
+#define HP4570N_REG_DPM_SET_DEF 0x84\r
+#define HP4570N_REG_SYS_CTRL0_DEF 0xA4\r
+#define HP4570N_REG_SYS_CTRL1_DEF 0x00\r
+#define HP4570N_REG_IDSG_ITERM_SET_DEF 0x91\r
+#define HP4570N_REG_BAT_VOL_SET_DEF 0x43\r
+#define HP4570N_REG_SYS_CTRL2_DEF 0x3A\r
+#define HP4570N_REG_SYS_CTRL3_DEF 0x40\r
+#define HP4570N_REG_SYS_CTRL4_DEF 0x24\r
+#define HP4570N_REG_CHIP_STAT1_DEF 0x00\r
+#define HP4570N_REG_VIPRE_DEF 0x01\r
+#define HP4570N_REG_EXT_CTRL_DEF 0x11\r
+#define HP4570N_REG_SYS_CTRL5_DEF 0x21\r
+#define HP4570N_REG_SYS_CTRL6_DEF 0x0C\r
+#define HP4570N_REG_SYS_CTRL7_DEF 0xB6\r
+#define HP4570N_REG_INT0_ENABLE_DEF 0x00\r
+#define HP4570N_REG_INT0_STAT_DEF 0x00\r
+#define HP4570N_REG_VID_LSB_DEF 0xC6\r
+#define HP4570N_REG_VID_MSB_DEF 0x34\r
+#define HP4570N_REG_PID_LSB_DEF 0x81\r
+#define HP4570N_REG_PID_MSB_DEF 0x03\r
+\r
+#define HP4570NJ_REG_SYS_CTRL0_DEF 0xAC\r
\r
// Function Declarations\r
-bool hp4570_init(uint8_t chip_ver);\r
-bool hp4570_identify(uint8_t chip_ver);\r
-\r
-void hp4570_set_pwrkey_en(bool en);// PWRKEY function enable control \r
-bool hp4570_set_trst_dgl_mS(uint32_t time);// Pull INT low to disconnect the battery then auto on\r
-\r
-void hp4570_reg_rst(void);// Register reset\r
-void hp4570_wdt_rst(void);// Watchdog timer reset\r
-void hp4570_vsys_rst(void);// VSYS reset\r
-void hp4570_set_rst_vin_entry_en(bool en);// VIN 4 pulse Reset Enable\r
-void hp4570_set_rst_pwrkey_en(bool en);// VSYS reset enable PWRKEY operation Enable\r
-void hp4570_set_rst_vsys_wvbus_en(bool en);// VSYS reset operation when VBUS is present\r
-\r
-void hp4570_entry_shipmode(void);\r
-bool hp4570_set_batfet_dis(bool en);// BATFET force off\r
-void hp4570_set_vbus_wk_en(bool en);// VBUS plug in to exit ship mode\r
-void hp4570_set_pwrkey_wk_en(bool en);// PWRKEY be low to exit ship mode\r
-bool hp4570_set_vin_exit_ship_tset_mS(uint16_t time);// IN Port Power Good Time Setting for Exit Shipmode\r
-bool hp4570_set_key_wk_time_mS(uint16_t time);// KEY wake up time set\r
-void hp4570_set_ship_dgl_en(bool en);// Enter ship mode deglitch enable control\r
-bool hp4570_set_ship_dgl_mS(uint16_t time);// Enter ship mode deglitch time \r
-\r
-\r
-void hp4570_set_hiz_en(bool en);// VBUS power path Hi-Z mode enable\r
-void hp4570_set_ceb_en(bool en);// Enable or disable charging function\r
-\r
-bool hp4570_set_vsys_reg_mV(float voltage);// VSYS regulation\r
-bool hp4570_set_trst_dur_mS(uint16_t time);// VSYS off time before auto on\r
-void hp4570_set_vindpm_en(bool en);\r
-void hp4570_set_iindpm_en(bool en);\r
-bool hp4570_set_vindpm_mV(uint16_t voltage);\r
-bool hp4570_set_iindpm_mA(uint16_t current);\r
-\r
-bool hp4570_set_chrg_vpre_mV(uint8_t voltage);// Battery pre-charge voltage set\r
-bool hp4570_set_chrg_vbat_mV(float voltage);\r
-bool hp4570_set_chrg_vre_mV(uint8_t voltage);// Battery re-charge voltage set\r
-bool hp4570_set_chrg_idead_mA(uint16_t current);\r
-bool hp4570_set_chrg_ipre_mA(uint16_t current);// Battery pre-charge current set\r
-bool hp4570_set_chrg_ichg_mA(uint16_t current);\r
-bool hp4570i_set_chrg_ichg_mA(uint16_t current);\r
-bool hp4570_set_chrg_iterm_mA(uint8_t current);\r
-void hp4570_set_chrg_term_en(bool en);// Termination is allowed or not\r
-void hp4570_set_chrg_term_tmr(bool en);// Termination timer control\r
-void hp4570_set_chrg_timer_en(bool en);// Safety timer set during charging\r
-bool hp4570_set_chrg_timer_hour(uint8_t time);// Fast charging mode timer set \r
-void hp4570_set_chrg_tmr2x_en(bool en);// Safety timer double during DPM/Thermal\r
-\r
-bool hp4570_set_ibatfet_ocp_mA(uint16_t current);\r
-bool hp4570_set_vbat_uvlo_mV(uint16_t voltage);// Battery UVLO falling threshold,hys is about =150mV\r
-bool hp4570_set_t_hiccup_mS(uint16_t time);// Hiccup timer set\r
-\r
-void hp4570_set_wdt_timer_en(bool en);// If watchdog timer already enable, function will do noting, otherwise will set as default \r
-bool hp4570_set_wdt_timer_mS(uint32_t time);\r
-void hp4570_set_wdt_chg_en(bool en);// Watchdog timer function enable control during charging\r
-void hp4570_set_wdt_dsg_en(bool en);// Watchdog timer function enable control during discharging\r
-void hp4570_set_wdt_vsys_rst_en(bool en);// Watch dog fault VSYS reset enable control \r
-\r
-void hp4570_set_ntc_en(bool en);// NTC enable during charging\r
-void hp4570_set_pcb_otp_en(bool en);// PCB_OTP enable\r
-bool hp4570_set_thermal_reg_degree(uint8_t degree);// Die temp control by Thermal loop\r
-\r
-void hp4570_set_int_pg_en(bool en);// Power good int enable control\r
-void hp4570_set_int_chrg_done_en(bool en);// Charge complete int enable control\r
-void hp4570_set_int_chrg_stat_en(bool en);// Charging status dynamic change int enable control\r
-void hp4570_set_int_ntc_transition_en(bool en);// Battery temp region change int enable control\r
-void hp4570_set_int_batovp_en(bool en);// Battery OVP int enable control\r
-void hp4570_set_int_wdt_en(bool en);// Watch dog time expire int enable control\r
-void hp4570_set_int_chg_safety_expired_en(bool en);// Charger enter safety int enable control\r
-\r
-bool hp4570_read_chrg_stat_not_chrg(void);\r
-bool hp4570_read_chrg_stat_dead_chrg(void);\r
-bool hp4570_read_chrg_stat_pre_chrg(void);\r
-bool hp4570_read_chrg_stat_fast_chrg(void);\r
-bool hp4570_read_chrg_stat_chrg_done(void);\r
-\r
-bool hp4570_read_status_wdt_fault(void);// Watchdog timer expired 1: Expired; 0: Not Expired\r
-bool hp4570_read_status_vindpm(void);// 1: In DPM; 0: Not DPM\r
-bool hp4570_read_status_vbus_pg(void);// 1: Power Good; 0: Not Good\r
-bool hp4570_read_status_thermal(void);// 1: In thermal; 0: Not thermal\r
-bool hp4570_read_status_vin_fault(void);// 1: Input fault ovp or bad source plug out; 0: normal \r
-bool hp4570_read_status_tshut(void);// 1: Thermal shutdown; 0: Normal\r
-bool hp4570_read_status_vbat_ovp(void);// 1: BAT_OVP; 0: Not BAT_OVP\r
-bool hp4570_read_status_safety_mode(void);// Charger safety timer expired 1: Expired; 0: Not Expired\r
-bool hp4570_read_status_ntc_hot(void);// 1: Hot; 0: Not hot\r
-bool hp4570_read_status_ntc_cold(void);// 1: Cold; 0: Not cold\r
-bool hp4570_read_status_iindpm(void);// 1: In DPM; 0: Not DPM\r
-bool hp4570_read_status_vin_entry_rst(void);// VIN_ENTRY_RST once happenned\r
-bool hp4570_read_status_pwrkey_rst(void);// PWRKEY reset once happened\r
-bool hp4570_read_status_hiccup_latch(void);// Hiccup once happened\r
-bool hp4570_read_status_pwrkey_wk(void);// PWRKEY 2S low time wake up from ship mode\r
-bool hp4570_read_status_vbus_wk(void);// VBUS plug in wake up from ship mode\r
-bool hp4570_read_status_watchdog_int(void);// Watch dog time expire IRQ\r
-\r
-void hp4570_set_iterm_2x_en(bool en);//Terminate charge current X2 enable control\r
-void hp4570_set_ipre_4x_en(bool en);//Pre-charge current X4 enable control\r
-void hp4570_set_ideadbat_4x_en(bool en);//dead battary charge current X4 enable control\r
-uint8_t hp4570_get_id(void);\r
-#endif // HP4570_CHARGER_H
\ No newline at end of file
+bool hp4570n_init(uint8_t chip_ver);\r
+bool hp4570n_identify(uint8_t chip_ver);\r
+\r
+void hp4570n_set_pwrkey_en(bool en);// PWRKEY function enable control \r
+bool hp4570n_set_trst_dgl_mS(uint32_t time);// Pull INT low to disconnect the battery then auto on\r
+\r
+void hp4570n_reg_rst(void);// Register reset\r
+void hp4570n_wdt_rst(void);// Watchdog timer reset\r
+void hp4570n_vsys_rst(void);// VSYS reset\r
+void hp4570n_set_rst_vin_entry_en(bool en);// VIN 4 pulse Reset Enable\r
+void hp4570n_set_rst_pwrkey_en(bool en);// VSYS reset enable PWRKEY operation Enable\r
+void hp4570n_set_rst_vsys_wvbus_en(bool en);// VSYS reset operation when VBUS is present\r
+\r
+void hp4570n_entry_shipmode(void);\r
+bool hp4570n_set_batfet_dis(bool en);// BATFET force off\r
+void hp4570n_set_vbus_wk_en(bool en);// VBUS plug in to exit ship mode\r
+void hp4570n_set_pwrkey_wk_en(bool en);// PWRKEY be low to exit ship mode\r
+bool hp4570n_set_vin_exit_ship_tset_mS(uint16_t time);// IN Port Power Good Time Setting for Exit Shipmode\r
+bool hp4570n_set_key_wk_time_mS(uint16_t time);// KEY wake up time set\r
+void hp4570n_set_ship_dgl_en(bool en);// Enter ship mode deglitch enable control\r
+bool hp4570n_set_ship_dgl_mS(uint16_t time);// Enter ship mode deglitch time \r
+\r
+\r
+void hp4570n_set_hiz_en(bool en);// VBUS power path Hi-Z mode enable\r
+void hp4570n_set_ceb_en(bool en);// Enable or disable charging function\r
+\r
+bool hp4570n_set_vsys_reg_mV(float voltage);// VSYS regulation\r
+bool hp4570n_set_trst_dur_mS(uint16_t time);// VSYS off time before auto on\r
+void hp4570n_set_vindpm_en(bool en);\r
+void hp4570n_set_iindpm_en(bool en);\r
+bool hp4570n_set_vindpm_mV(uint16_t voltage);\r
+bool hp4570n_set_iindpm_mA(uint16_t current);\r
+\r
+bool hp4570n_set_chrg_vpre_mV(uint8_t voltage);// Battery pre-charge voltage set\r
+bool hp4570n_set_chrg_vbat_mV(float voltage);\r
+bool hp4570n_set_chrg_vre_mV(uint8_t voltage);// Battery re-charge voltage set\r
+bool hp4570n_set_high_chrg_idead_mA(uint16_t current);\r
+bool hp4570n_set_low_chrg_idead_mA(uint16_t current);\r
+bool hp4570n_set_high_chrg_ipre_mA(uint16_t current);// Battery pre-charge current set\r
+bool hp4570n_set_low_chrg_ipre_mA(uint16_t current);\r
+bool hp4570n_set_chrg_ichg_mA(uint16_t current);\r
+bool hp4570ni_set_chrg_ichg_mA(uint16_t current);\r
+bool hp4570n_set_chrg_iterm_mA(uint8_t current);\r
+void hp4570n_set_chrg_term_en(bool en);// Termination is allowed or not\r
+void hp4570n_set_chrg_term_tmr(bool en);// Termination timer control\r
+void hp4570n_set_chrg_timer_en(bool en);// Safety timer set during charging\r
+bool hp4570n_set_chrg_timer_hour(uint8_t time);// Fast charging mode timer set \r
+void hp4570n_set_chrg_tmr2x_en(bool en);// Safety timer double during DPM/Thermal\r
+\r
+bool hp4570n_set_high_ibatfet_ocp_mA(uint16_t current);\r
+bool hp4570n_set_low_ibatfet_ocp_mA(uint16_t current);\r
+bool hp4570n_set_vbat_uvlo_mV(uint16_t voltage);// Battery UVLO falling threshold,hys is about =150mV\r
+bool hp4570n_set_t_hiccup_mS(uint16_t time);// Hiccup timer set\r
+\r
+void hp4570n_set_wdt_timer_en(bool en);// If watchdog timer already enable, function will do noting, otherwise will set as default \r
+bool hp4570n_set_wdt_timer_mS(uint32_t time);\r
+void hp4570n_set_wdt_chg_en(bool en);// Watchdog timer function enable control during charging\r
+void hp4570n_set_wdt_dsg_en(bool en);// Watchdog timer function enable control during discharging\r
+void hp4570n_set_wdt_vsys_rst_en(bool en);// Watch dog fault VSYS reset enable control \r
+\r
+void hp4570n_set_ntc_en(bool en);// NTC enable during charging\r
+void hp4570n_set_pcb_otp_en(bool en);// PCB_OTP enable\r
+bool hp4570n_set_thermal_reg_degree(uint8_t degree);// Die temp control by Thermal loop\r
+\r
+void hp4570n_set_int_pg_en(bool en);// Power good int enable control\r
+void hp4570n_set_int_chrg_done_en(bool en);// Charge complete int enable control\r
+void hp4570n_set_int_chrg_stat_en(bool en);// Charging status dynamic change int enable control\r
+void hp4570n_set_int_ntc_transition_en(bool en);// Battery temp region change int enable control\r
+void hp4570n_set_int_batovp_en(bool en);// Battery OVP int enable control\r
+void hp4570n_set_int_wdt_en(bool en);// Watch dog time expire int enable control\r
+void hp4570n_set_int_chg_safety_expired_en(bool en);// Charger enter safety int enable control\r
+\r
+bool hp4570n_read_chrg_stat_not_chrg(void);\r
+bool hp4570n_read_chrg_stat_dead_chrg(void);\r
+bool hp4570n_read_chrg_stat_pre_chrg(void);\r
+bool hp4570n_read_chrg_stat_fast_chrg(void);\r
+bool hp4570n_read_chrg_stat_chrg_done(void);\r
+\r
+bool hp4570n_read_status_wdt_fault(void);// Watchdog timer expired 1: Expired; 0: Not Expired\r
+bool hp4570n_read_status_vindpm(void);// 1: In DPM; 0: Not DPM\r
+bool hp4570n_read_status_vbus_pg(void);// 1: Power Good; 0: Not Good\r
+bool hp4570n_read_status_thermal(void);// 1: In thermal; 0: Not thermal\r
+bool hp4570n_read_status_vin_fault(void);// 1: Input fault ovp or bad source plug out; 0: normal \r
+bool hp4570n_read_status_tshut(void);// 1: Thermal shutdown; 0: Normal\r
+bool hp4570n_read_status_vbat_ovp(void);// 1: BAT_OVP; 0: Not BAT_OVP\r
+bool hp4570n_read_status_safety_mode(void);// Charger safety timer expired 1: Expired; 0: Not Expired\r
+bool hp4570n_read_status_ntc_hot(void);// 1: Hot; 0: Not hot\r
+bool hp4570n_read_status_ntc_cold(void);// 1: Cold; 0: Not cold\r
+bool hp4570n_read_status_iindpm(void);// 1: In DPM; 0: Not DPM\r
+bool hp4570n_read_status_vin_entry_rst(void);// VIN_ENTRY_RST once happenned\r
+bool hp4570n_read_status_pwrkey_rst(void);// PWRKEY reset once happened\r
+bool hp4570n_read_status_hiccup_latch(void);// Hiccup once happened\r
+bool hp4570n_read_status_pwrkey_wk(void);// PWRKEY 2S low time wake up from ship mode\r
+bool hp4570n_read_status_vbus_wk(void);// VBUS plug in wake up from ship mode\r
+bool hp4570n_read_status_watchdog_int(void);// Watch dog time expire IRQ\r
+\r
+void hp4570n_set_iterm_2x_en(bool en);//Terminate charge current X2 enable control\r
+void hp4570n_set_ipre_4x_en(bool en);//Pre-charge current X4 enable control\r
+void hp4570n_set_ideadbat_4x_en(bool en);//dead battary charge current X4 enable control\r
+uint8_t hp4570n_get_id(void);\r
+#endif // HP4570N_CHARGER_H
\ No newline at end of file
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