From: SnickerSun <snickersun@163.com>
Date: Thu, 2 May 2024 15:43:50 +0000 (+0800)
Subject: add efuse patch
X-Git-Url: http://git.snicker.com.cn/?a=commitdiff_plain;h=refs%2Fchanges%2F191%2Fhead;p=mirrors%2FFD230.git

add efuse patch
---

diff --git a/code/sdk/application/brandy/brandy_recovery/main.c b/code/sdk/application/brandy/brandy_recovery/main.c
index c9a2b2b6a..9d77e378f 100755
--- a/code/sdk/application/brandy/brandy_recovery/main.c
+++ b/code/sdk/application/brandy/brandy_recovery/main.c
@@ -279,7 +279,7 @@ static void chip_init(void)
 
     cpu_trace_enable_mcpu_repeat();
 
-    otp_init();
+    // otp_init();
     uapi_pm_control(PM_SDIO_POWER_UP_AND_RUN);
 }
 
diff --git a/code/sdk/application/brandy/brandy_standard/chip_init.c b/code/sdk/application/brandy/brandy_standard/chip_init.c
index 8de3e7b16..81c71571d 100755
--- a/code/sdk/application/brandy/brandy_standard/chip_init.c
+++ b/code/sdk/application/brandy/brandy_standard/chip_init.c
@@ -182,7 +182,7 @@ void chip_init(void)
 
     log_memory_region_init();
 
-    otp_init();
+    // otp_init();
 #if ENABLE_LOW_POWER == YES
     copy_from_flash_to_pm_text();
 #endif
diff --git a/code/sdk/build/config/target_config/brandy/target_config.py b/code/sdk/build/config/target_config/brandy/target_config.py
index 98a05250d..83bd831a1 100755
--- a/code/sdk/build/config/target_config/brandy/target_config.py
+++ b/code/sdk/build/config/target_config/brandy/target_config.py
@@ -17,7 +17,7 @@ target_template = {
         'hso_enable': False,
         'os': 'non-os',
         'CONFIG_WATCHDOG_USING_V100': 'y',
-        'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE'],
+        'defines': ["RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_EFUSE_CLK_EN'],
         'std_libs': ['c', 'm', 'clang_rt.builtins-riscv32', 'gloss'],
         'defines_set': ['libsec_defines', 'chip_defines', 'version_defines'],
         'ram_component_set': ['cpu_trace', 'ipc', 'mem', 'boot_common_lib', 'gpio_v100', 'ssb_libs',
@@ -54,7 +54,7 @@ target_template = {
                     "CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC',
                     "RISCV_70", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE',
                     "DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA',
-                    'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC'],
+                    'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
         'defines_set': ['chip_defines', 'version_defines'],
         'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header', 'nand_flash',
                           'brandy_app_standard', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors',
@@ -92,7 +92,7 @@ target_template = {
                     "CONFIG_NV_SUPPORT_SINGLE_CORE_SYSTEM", 'CONFIG_NV_FEATURE_SUPPORT', 'CONFIG_SPI_SUPPORT_LPC',
                     "CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_PINCTRL_SUPPORT_IE',
                     "DUMP_MEM_SUPPORT", "DUMP_REG_SUPPORT", "SUPPORT_DFX_EXCEPTION", 'CONFIG_SPI_SUPPORT_DMA',
-                    'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC'],
+                    'CONFIG_I2C_SUPPORT_DMA', 'FREERTOS_DEBUG', 'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
         'defines_set': ['chip_defines', 'version_defines'],
         'ram_component': ['brandy_std_lds', 'chip_brandy', 'brandy_app_standard', 'driver_header',
                           'board_brandy', 'brandy_clocks', 'pmu_brandy', 'c', 'm', 'segger', 'posix', 'sec', 'freertos',
@@ -131,7 +131,8 @@ target_template = {
                     'CONFIG_PINCTRL_SUPPORT_IE', 'CONFIG_DFX_SUPPORT_SOC_LOG=0',
                     'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0',
                     'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0', 'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0',
-                    'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'],
+                    'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0', 'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0',
+                    'CONFIG_EFUSE_CLK_EN'],
         'defines_set': ['chip_defines', 'version_defines'],
         'ram_component': ['brandy_recovery_lds', 'liteos_207_1_0', 'partition', 'chip_brandy', 'driver_header',
                           'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy',
@@ -170,7 +171,7 @@ target_template = {
                     'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_DFX_SUPPORT_TRANSMIT_FILE=0', 'CONFIG_DFX_SUPPORT_SOC_LOG=0',
                     'CONFIG_DFX_SUPPORT_DIAG_BEAT_HEART=0', 'CONFIG_DFX_SUPPORT_DIAG_VRTTUAL_SHELL=0',
                     'CONFIG_DFX_SUPPORT_DIAG_CONNECT_BLE=0', 'CONFIG_DFX_SUPPORT_OFFLINE_LOG_FILE=0',
-                    'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0'],
+                    'CONFIG_DFX_MEMORY_DEBUG=0', 'CONFIG_DFX_SUPPORT_DIAG_ADAPT_SOC_LOG=0', 'CONFIG_EFUSE_CLK_EN'],
         'defines_set': ['chip_defines', 'version_defines'],
         'ram_component': ['brandy_recovery_lds', 'partition', 'chip_brandy', 'freertos', 'cmsis_rtos', 'xlt_mem',
                           'brandy_app_recovery', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'partition_brandy',
@@ -210,7 +211,7 @@ target_template = {
                     "RISCV_70", "CONFIG_XIP_ENABLE_READ_OVERTIME", 'SUPPORT_DIAG_V2_PROTOCOL', 'CONFIG_SPI_SUPPORT_LPC',
                     "SUPPORT_GPU_JPEG", "SUPPORT_GPU_GMMU", "SUPPORT_GPU_OPENVG", 'CONFIG_PINCTRL_SUPPORT_IE',
                     'CONFIG_SPI_SUPPORT_DMA', 'CONFIG_I2C_SUPPORT_DMA', 'CONFIG_UART_SUPPORT_DMA',
-                    'CONFIG_I2C_SUPPORT_LPC'],
+                    'CONFIG_I2C_SUPPORT_LPC', 'CONFIG_EFUSE_CLK_EN'],
         'defines_set': ['chip_defines', 'version_defines'],
         'ram_component': ['brandy_std_lds', 'liteos_207_1_0', 'chip_brandy', 'driver_header', 'nand_flash',
                           'brandy_testsuite', 'board_brandy', 'brandy_clocks', 'pmu_brandy', 'hal_sectors',
diff --git a/code/sdk/drivers/chips/brandy/config/otp_map.h b/code/sdk/drivers/chips/brandy/config/otp_map.h
index fed10f8e4..6e7185af2 100755
--- a/code/sdk/drivers/chips/brandy/config/otp_map.h
+++ b/code/sdk/drivers/chips/brandy/config/otp_map.h
@@ -232,6 +232,12 @@
 #define OTP_DSP_OVERLAY_ROLLBACK_VERSION_BIT 32
 
 #define OTP_ATE_CRC                       255
+
+// reserved 256-383(128 bytes) for user
+#define OTP_APP_USER_START              256
+#define OTP_APP_USER_END                383
+
+
 /**
  * @}
  */
diff --git a/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h b/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h
old mode 100755
new mode 100644
index d71f820f5..1df6369b0
--- a/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h
+++ b/code/sdk/drivers/chips/brandy/porting/include/efuse_porting.h
@@ -1,185 +1,200 @@
-/**
- * Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved. \n
- *
- * Description: Provides efuse port template \n
- * Author: @CompanyNameTag \n
- * History: \n
- * 2022-07-25， Create file. \n
- */
-
-#ifndef EFUSE_PORTING_H
-#define EFUSE_PORTING_H
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-/**
- * @defgroup drivers_port_efuse Efuse
- * @ingroup  drivers_port
- * @{
- */
-
-#define EFUSE_REGION_NUM               3
-#define EFUSE_REGION_MAX_BITS          1024
-#define EFUSE_REGION_MAX_BYTES         (EFUSE_REGION_MAX_BITS >> 3)  // MAX_BIT / 8
-#define EFUSE_MAX_BITS                 (EFUSE_REGION_MAX_BITS * EFUSE_REGION_NUM)
-#define EFUSE_MAX_BYTES                (EFUSE_MAX_BITS >> 3)  // MAX_BIT / 8
-#define EFUSE_MAX_BIT_POS              8U
-#define bit(x) (1UL << (uint32_t)(x))
-#define EFUSE_PMU_CLKLDO_VSET_MASK       0x78
-#define EFUSE_PMU_CLKLDO_OFFSET          3
-#define EFUSE_TRIM_VERSION_DEFAULT_VALUE 1
-#define EFUSE_CHAR_BIT_WIDE              8
-#define EFUSE_CALC_CRC_MAX_LEN          32
-#define HAL_EFUSE0_REGION_SIZE EFUSE_REGION_MAX_BYTES
-#define HAL_EFUSE1_REGION_SIZE EFUSE_REGION_MAX_BYTES
-#define HAL_EFUSE2_REGION_SIZE EFUSE_REGION_MAX_BYTES
-#define EFUSE_DIE_ID_BASE_BYTE_ADDR     0
-#define EFUSE_BIT_OPERATION             YES
-
-#define EFUSE_TRIM_FLAG    50
-#define EFUSE_IS_CHIP_TRIMED 0
-// 7-0 -> Version of the trim
-#define EFUSE_TRIM_VERSION 51
-// 2-0 -> vset_bbldo[3:1]
-// 6-3 -> vset_clkldo[3:0]
-#define EFUSE_PMU_TRIM_VSET 25
-
-typedef enum {
-    HAL_EFUSE_REGION_0,
-    HAL_EFUSE_REGION_1,
-    HAL_EFUSE_REGION_2,
-    HAL_EFUSE_REGION_MAX,
-} hal_efuse_region_t;
-
-/**
- * @if Eng
- * @brief  Base address for the IP.
- * @else
- * @brief  IP的基地址
- * @endif
- */
-extern const uintptr_t g_efuse_base_addr[EFUSE_REGION_NUM];
-
-/**
- * @if Eng
- * @brief  Base read address for the IP.
- * @else
- * @brief  IP的读基地址
- * @endif
- */
-extern const uintptr_t g_efuse_region_read_address[EFUSE_REGION_NUM];
-
-/**
- * @if Eng
- * @brief  Base write address for the IP.
- * @else
- * @brief  IP的写基地址
- * @endif
- */
-extern const uintptr_t g_efuse_region_write_address[EFUSE_REGION_NUM];
-
-/**
- * @if Eng
- * @brief  EFUSE region size
- * @else
- * @brief  EFUSE各区域大小
- * @endif
- */
-extern const uintptr_t g_efuse_region_size[EFUSE_REGION_NUM];
-
-/**
- * @if Eng
- * @brief  Register hal funcs objects into hal_efuse module.
- * @else
- * @brief  将hal funcs对象注册到hal_efuse模块中
- * @endif
- */
-void efuse_port_register_hal_funcs(void);
-
-/**
- * @if Eng
- * @brief  Unregister hal funcs objects from hal_efuse module.
- * @else
- * @brief  从hal_efuse模块注销hal funcs对象
- * @endif
- */
-void efuse_port_unregister_hal_funcs(void);
-
-/**
- * @brief  Get the region of a otp byte address
- * @param  byte_addr the addr of the byte to get register
- * @retval region The region of otp
- * @else
- * @brief  获取otp字节地址的区域
- * @param  byte_addr 要获取寄存器的字节的地址
- * @retval 区域OTP的区域
- */
-hal_efuse_region_t hal_efuse_get_region(uint32_t byte_addr);
-
-/**
- * @brief  Get the offset addr of a otp byte address
- * @param  byte_addr the addr of the byte to get register
- * @retval address
- * @else
- * @brief  获取otp字节地址的偏移地址
- * @param  byte_addr 要获取寄存器的字节的地址
- * @retval 偏移地址
- */
-uint16_t hal_efuse_get_byte_offset(uint32_t byte_addr);
-
-
-/**
- * @brief  load switch4 enbale signal.
- * @param  val Value to be written to the register
- * @retval address
- * @else
- * @brief  负载开关4使能
- * @param  val 要写入寄存器的值
- * @retval 偏移地址
- */
-void efuse_port_set_en_switch(uint32_t val);
-
-/**
- * @if Eng
- * @brief  Obtains the enable signal of load switch 4.
- * @else
- * @brief  获取负载开关4使能信号。
- * @endif
- */
-uint8_t efuse_port_get_en_switch(void);
-
-/**
- * @if Eng
- * @brief  Reload the efuse data before reads multiple bytes from the eFuse into the provided buffer.
- * @param  [in] buffer The value of the bit read.
- * @param  [in] byte_number The source eFuse bit byte_number of the bit to be read.
- * @param  [in] length The length of the data, in bytes.
- * @retval ERRCODE_SUCC Success.
- * @retval Other        Failure. For details, see @ref errcode_t.
- * @else
- * @brief  重新从efuse源头加载数据后，再从eFuse中读取多个字节，进入提供的缓冲区。
- * @param  [in] buffer 保存读取数据的缓冲区。
- * @param  [in] byte_number 要读取的数据的初始源eFuse字节地址。
- * @param  [in] length 数据的长度，以字节为单位。
- * @retval ERRCODE_SUCC 成功。
- * @retval Other        失败，参考 @ref errcode_t 。
- * @endif
- */
-errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length);
-/**
- * @}
- */
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-#endif
+/**
+ * Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved. \n
+ *
+ * Description: Provides efuse port template \n
+ * Author: @CompanyNameTag \n
+ * History: \n
+ * 2022-07-25， Create file. \n
+ */
+
+#ifndef EFUSE_PORTING_H
+#define EFUSE_PORTING_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+/**
+ * @defgroup drivers_port_efuse Efuse
+ * @ingroup  drivers_port
+ * @{
+ */
+
+#define EFUSE_REGION_NUM               3
+#define EFUSE_REGION_MAX_BITS          1024
+#define EFUSE_REGION_MAX_BYTES         (EFUSE_REGION_MAX_BITS >> 3)  // MAX_BIT / 8
+#define EFUSE_MAX_BITS                 (EFUSE_REGION_MAX_BITS * EFUSE_REGION_NUM)
+#define EFUSE_MAX_BYTES                (EFUSE_MAX_BITS >> 3)  // MAX_BIT / 8
+#define EFUSE_MAX_BIT_POS              8U
+#define bit(x) (1UL << (uint32_t)(x))
+#define EFUSE_PMU_CLKLDO_VSET_MASK       0x78
+#define EFUSE_PMU_CLKLDO_OFFSET          3
+#define EFUSE_TRIM_VERSION_DEFAULT_VALUE 1
+#define EFUSE_CHAR_BIT_WIDE              8
+#define EFUSE_CALC_CRC_MAX_LEN          32
+#define HAL_EFUSE0_REGION_SIZE EFUSE_REGION_MAX_BYTES
+#define HAL_EFUSE1_REGION_SIZE EFUSE_REGION_MAX_BYTES
+#define HAL_EFUSE2_REGION_SIZE EFUSE_REGION_MAX_BYTES
+#define EFUSE_DIE_ID_BASE_BYTE_ADDR     0
+#define EFUSE_BIT_OPERATION             YES
+
+#define EFUSE_TRIM_FLAG    50
+#define EFUSE_IS_CHIP_TRIMED 0
+// 7-0 -> Version of the trim
+#define EFUSE_TRIM_VERSION 51
+// 2-0 -> vset_bbldo[3:1]
+// 6-3 -> vset_clkldo[3:0]
+#define EFUSE_PMU_TRIM_VSET 25
+
+typedef enum {
+    HAL_EFUSE_REGION_0,
+    HAL_EFUSE_REGION_1,
+    HAL_EFUSE_REGION_2,
+    HAL_EFUSE_REGION_MAX,
+} hal_efuse_region_t;
+
+/**
+ * @if Eng
+ * @brief  Base address for the IP.
+ * @else
+ * @brief  IP的基地址
+ * @endif
+ */
+extern const uintptr_t g_efuse_base_addr[EFUSE_REGION_NUM];
+
+/**
+ * @if Eng
+ * @brief  Base read address for the IP.
+ * @else
+ * @brief  IP的读基地址
+ * @endif
+ */
+extern const uintptr_t g_efuse_region_read_address[EFUSE_REGION_NUM];
+
+/**
+ * @if Eng
+ * @brief  Base write address for the IP.
+ * @else
+ * @brief  IP的写基地址
+ * @endif
+ */
+extern const uintptr_t g_efuse_region_write_address[EFUSE_REGION_NUM];
+
+/**
+ * @if Eng
+ * @brief  EFUSE region size
+ * @else
+ * @brief  EFUSE各区域大小
+ * @endif
+ */
+extern const uintptr_t g_efuse_region_size[EFUSE_REGION_NUM];
+
+/**
+ * @if Eng
+ * @brief  Register hal funcs objects into hal_efuse module.
+ * @else
+ * @brief  将hal funcs对象注册到hal_efuse模块中
+ * @endif
+ */
+void efuse_port_register_hal_funcs(void);
+
+/**
+ * @if Eng
+ * @brief  Unregister hal funcs objects from hal_efuse module.
+ * @else
+ * @brief  从hal_efuse模块注销hal funcs对象
+ * @endif
+ */
+void efuse_port_unregister_hal_funcs(void);
+
+/**
+ * @brief  Get the region of a otp byte address
+ * @param  byte_addr the addr of the byte to get register
+ * @retval region The region of otp
+ * @else
+ * @brief  获取otp字节地址的区域
+ * @param  byte_addr 要获取寄存器的字节的地址
+ * @retval 区域OTP的区域
+ */
+hal_efuse_region_t hal_efuse_get_region(uint32_t byte_addr);
+
+/**
+ * @brief  Get the offset addr of a otp byte address
+ * @param  byte_addr the addr of the byte to get register
+ * @retval address
+ * @else
+ * @brief  获取otp字节地址的偏移地址
+ * @param  byte_addr 要获取寄存器的字节的地址
+ * @retval 偏移地址
+ */
+uint16_t hal_efuse_get_byte_offset(uint32_t byte_addr);
+
+
+/**
+ * @brief  load switch4 enbale signal.
+ * @param  val Value to be written to the register
+ * @retval address
+ * @else
+ * @brief  负载开关4使能
+ * @param  val 要写入寄存器的值
+ * @retval 偏移地址
+ */
+void efuse_port_set_en_switch(uint32_t val);
+
+/**
+ * @if Eng
+ * @brief  Obtains the enable signal of load switch 4.
+ * @else
+ * @brief  获取负载开关4使能信号。
+ * @endif
+ */
+uint8_t efuse_port_get_en_switch(void);
+
+/**
+ * @if Eng
+ * @brief  Reload the efuse data before reads multiple bytes from the eFuse into the provided buffer.
+ * @param  [in] buffer The value of the bit read.
+ * @param  [in] byte_number The source eFuse bit byte_number of the bit to be read.
+ * @param  [in] length The length of the data, in bytes.
+ * @retval ERRCODE_SUCC Success.
+ * @retval Other        Failure. For details, see @ref errcode_t.
+ * @else
+ * @brief  重新从efuse源头加载数据后，再从eFuse中读取多个字节，进入提供的缓冲区。
+ * @param  [in] buffer 保存读取数据的缓冲区。
+ * @param  [in] byte_number 要读取的数据的初始源eFuse字节地址。
+ * @param  [in] length 数据的长度，以字节为单位。
+ * @retval ERRCODE_SUCC 成功。
+ * @retval Other        失败，参考 @ref errcode_t 。
+ * @endif
+ */
+errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length);
+
+/**
+ * @if Eng
+ * @brief  Open or close efuse region clock gate.
+ * @param  [in] efuse_region the efuse region index.
+ * @param  [in] en open or close.
+ * @else
+ * @brief  打开efuse的时钟门控。
+ * @param  [in] efuse_region efuse 区域。
+ * @param  [in] en 打开或关闭时钟。
+ * @endif
+ */
+void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#endif
diff --git a/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c b/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c
old mode 100755
new mode 100644
index 808c94852..68258bf1e
--- a/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c
+++ b/code/sdk/drivers/chips/brandy/porting/security/efuse/efuse_porting.c
@@ -1,121 +1,147 @@
-/**
- * Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved. \n
- *
- * Description: Provides efuse port template \n
- * Author: @CompanyNameTag \n
- * History: \n
- * 2022-10-20， Create file. \n
- */
-#include "hal_efuse_v100.h"
-#include "efuse_porting.h"
-
-#define FUSE_CTL_RB_BASE            0x57028000
-#define FUSE_CTL_MCU_RB_BASE        0x52082000
-#define EFUSE0_BASE_ADDR             (FUSE_CTL_RB_BASE + 0xD00)
-#define EFUSE1_BASE_ADDR             (FUSE_CTL_MCU_RB_BASE + 0xD10)
-#define EFUSE2_BASE_ADDR             (FUSE_CTL_MCU_RB_BASE + 0xD20)
-#define HAL_EFUSE0_WRITE_BASE_ADDR   (FUSE_CTL_RB_BASE + 0x700)
-#define HAL_EFUSE1_WRITE_BASE_ADDR   (FUSE_CTL_MCU_RB_BASE + 0x700)
-#define HAL_EFUSE2_WRITE_BASE_ADDR   (FUSE_CTL_MCU_RB_BASE + 0x700)
-#define HAL_EFUSE0_READ_BASE_ADDR    (FUSE_CTL_RB_BASE + 0x800)
-#define HAL_EFUSE1_READ_BASE_ADDR    (FUSE_CTL_MCU_RB_BASE + 0xA00)
-#define HAL_EFUSE2_READ_BASE_ADDR    (FUSE_CTL_MCU_RB_BASE + 0xC00)
-#define HAL_EFUSE_POWER_ON_SWITCH     0x57004258
-
-const uintptr_t g_efuse_base_addr[EFUSE_REGION_NUM] = {
-    (uintptr_t)EFUSE0_BASE_ADDR,
-    (uintptr_t)EFUSE1_BASE_ADDR,
-    (uintptr_t)EFUSE2_BASE_ADDR
-};
-const uintptr_t g_efuse_region_read_address[EFUSE_REGION_NUM] = {
-    (uintptr_t)HAL_EFUSE0_READ_BASE_ADDR,
-    (uintptr_t)HAL_EFUSE1_READ_BASE_ADDR,
-    (uintptr_t)HAL_EFUSE2_READ_BASE_ADDR
-};
-const uintptr_t g_efuse_region_write_address[EFUSE_REGION_NUM] = {
-    (uintptr_t)HAL_EFUSE0_WRITE_BASE_ADDR,
-    (uintptr_t)HAL_EFUSE1_WRITE_BASE_ADDR,
-    (uintptr_t)HAL_EFUSE2_WRITE_BASE_ADDR
-};
-
-const uintptr_t g_efuse_region_size[EFUSE_REGION_NUM] = {
-    (uintptr_t)HAL_EFUSE0_REGION_SIZE,
-    (uintptr_t)HAL_EFUSE1_REGION_SIZE,
-    (uintptr_t)HAL_EFUSE2_REGION_SIZE,
-};
-
-typedef union efuse_en_switch_data {
-    uint32_t    d32;
-    struct {
-        uint32_t    en_efuse_switch_val    : 16;
-    } b;
-}en_switch_data_t;
-
-typedef struct efuse_en_switch_reg {
-    volatile en_switch_data_t en_switch_data;
-} efuse_en_switch_reg_t;
-
-static efuse_en_switch_reg_t *g_efuse_en_switch_reg = (efuse_en_switch_reg_t*)(uintptr_t)HAL_EFUSE_POWER_ON_SWITCH;
-
-static inline uint8_t get_efuse_en_switch_val(void)
-{
-    en_switch_data_t en_switch_val;
-    en_switch_val.d32 = g_efuse_en_switch_reg->en_switch_data.d32;
-    return (uint8_t)en_switch_val.b.en_efuse_switch_val;
-}
-
-static inline void set_efuse_en_switch_val(uint32_t val)
-{
-    en_switch_data_t en_switch_val;
-    en_switch_val.d32 = g_efuse_en_switch_reg->en_switch_data.d32;
-    en_switch_val.b.en_efuse_switch_val = val;
-    g_efuse_en_switch_reg->en_switch_data.d32 = en_switch_val.d32;
-}
-
-void efuse_port_register_hal_funcs(void)
-{
-    hal_efuse_register_funcs(hal_efuse_v100_funcs_get());
-}
-
-void efuse_port_unregister_hal_funcs(void)
-{
-    hal_efuse_unregister_funcs();
-}
-
-hal_efuse_region_t hal_efuse_get_region(uint32_t byte_addr)
-{
-    return (hal_efuse_region_t)(byte_addr / EFUSE_REGION_MAX_BYTES);
-}
-
-uint16_t hal_efuse_get_byte_offset(uint32_t byte_addr)
-{
-    return byte_addr % EFUSE_REGION_MAX_BYTES;
-}
-
-void efuse_port_set_en_switch(uint32_t val)
-{
-    set_efuse_en_switch_val(val);
-}
-
-uint8_t efuse_port_get_en_switch(void)
-{
-    return get_efuse_en_switch_val();
-}
-
-errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length)
-{
-    if ((length == 0) || (byte_number >= EFUSE_MAX_BYTES) ||
-    ((byte_number + length) > EFUSE_MAX_BYTES) || (buffer == NULL)) {
-        return ERRCODE_FAIL;
-    }
-    hal_efuse_funcs_t *hal_funcs = hal_efuse_get_funcs();
-    if (hal_funcs->refresh_read(HAL_EFUSE_REGION_1) != ERRCODE_SUCC) {
-        return ERRCODE_FAIL;
-    }
-    for (uint32_t i = 0; i < length; i++) {
-        if (hal_funcs->read_byte(byte_number + i, &buffer[i]) != ERRCODE_SUCC) {
-            return ERRCODE_FAIL;
-        }
-    }
-    return ERRCODE_SUCC;
+/**
+ * Copyright (c) @CompanyNameMagicTag 2022-2022. All rights reserved. \n
+ *
+ * Description: Provides efuse port template \n
+ * Author: @CompanyNameTag \n
+ * History: \n
+ * 2022-10-20， Create file. \n
+ */
+#include "hal_efuse_v100.h"
+#include "efuse_porting.h"
+#include "chip_io.h"
+
+#define FUSE_CTL_RB_BASE            0x57028000
+#define FUSE_CTL_MCU_RB_BASE        0x52082000
+#define EFUSE0_BASE_ADDR             (FUSE_CTL_RB_BASE + 0xD00)
+#define EFUSE1_BASE_ADDR             (FUSE_CTL_MCU_RB_BASE + 0xD10)
+#define EFUSE2_BASE_ADDR             (FUSE_CTL_MCU_RB_BASE + 0xD20)
+#define HAL_EFUSE0_WRITE_BASE_ADDR   (FUSE_CTL_RB_BASE + 0x700)
+#define HAL_EFUSE1_WRITE_BASE_ADDR   (FUSE_CTL_MCU_RB_BASE + 0x700)
+#define HAL_EFUSE2_WRITE_BASE_ADDR   (FUSE_CTL_MCU_RB_BASE + 0x700)
+#define HAL_EFUSE0_READ_BASE_ADDR    (FUSE_CTL_RB_BASE + 0x800)
+#define HAL_EFUSE1_READ_BASE_ADDR    (FUSE_CTL_MCU_RB_BASE + 0xA00)
+#define HAL_EFUSE2_READ_BASE_ADDR    (FUSE_CTL_MCU_RB_BASE + 0xC00)
+#define HAL_EFUSE_POWER_ON_SWITCH     0x57004258
+
+const uintptr_t g_efuse_base_addr[EFUSE_REGION_NUM] = {
+    (uintptr_t)EFUSE0_BASE_ADDR,
+    (uintptr_t)EFUSE1_BASE_ADDR,
+    (uintptr_t)EFUSE2_BASE_ADDR
+};
+const uintptr_t g_efuse_region_read_address[EFUSE_REGION_NUM] = {
+    (uintptr_t)HAL_EFUSE0_READ_BASE_ADDR,
+    (uintptr_t)HAL_EFUSE1_READ_BASE_ADDR,
+    (uintptr_t)HAL_EFUSE2_READ_BASE_ADDR
+};
+const uintptr_t g_efuse_region_write_address[EFUSE_REGION_NUM] = {
+    (uintptr_t)HAL_EFUSE0_WRITE_BASE_ADDR,
+    (uintptr_t)HAL_EFUSE1_WRITE_BASE_ADDR,
+    (uintptr_t)HAL_EFUSE2_WRITE_BASE_ADDR
+};
+
+const uintptr_t g_efuse_region_size[EFUSE_REGION_NUM] = {
+    (uintptr_t)HAL_EFUSE0_REGION_SIZE,
+    (uintptr_t)HAL_EFUSE1_REGION_SIZE,
+    (uintptr_t)HAL_EFUSE2_REGION_SIZE,
+};
+
+typedef union efuse_en_switch_data {
+    uint32_t    d32;
+    struct {
+        uint32_t    en_efuse_switch_val    : 16;
+    } b;
+}en_switch_data_t;
+
+typedef struct efuse_en_switch_reg {
+    volatile en_switch_data_t en_switch_data;
+} efuse_en_switch_reg_t;
+
+static efuse_en_switch_reg_t *g_efuse_en_switch_reg = (efuse_en_switch_reg_t*)(uintptr_t)HAL_EFUSE_POWER_ON_SWITCH;
+
+static inline uint8_t get_efuse_en_switch_val(void)
+{
+    en_switch_data_t en_switch_val;
+    en_switch_val.d32 = g_efuse_en_switch_reg->en_switch_data.d32;
+    return (uint8_t)en_switch_val.b.en_efuse_switch_val;
+}
+
+static inline void set_efuse_en_switch_val(uint32_t val)
+{
+    en_switch_data_t en_switch_val;
+    en_switch_val.d32 = g_efuse_en_switch_reg->en_switch_data.d32;
+    en_switch_val.b.en_efuse_switch_val = val;
+    g_efuse_en_switch_reg->en_switch_data.d32 = en_switch_val.d32;
+}
+
+void efuse_port_register_hal_funcs(void)
+{
+    hal_efuse_register_funcs(hal_efuse_v100_funcs_get());
+}
+
+void efuse_port_unregister_hal_funcs(void)
+{
+    hal_efuse_unregister_funcs();
+}
+
+hal_efuse_region_t hal_efuse_get_region(uint32_t byte_addr)
+{
+    return (hal_efuse_region_t)(byte_addr / EFUSE_REGION_MAX_BYTES);
+}
+
+uint16_t hal_efuse_get_byte_offset(uint32_t byte_addr)
+{
+    return byte_addr % EFUSE_REGION_MAX_BYTES;
+}
+
+void efuse_port_set_en_switch(uint32_t val)
+{
+    set_efuse_en_switch_val(val);
+}
+
+uint8_t efuse_port_get_en_switch(void)
+{
+    return get_efuse_en_switch_val();
+}
+
+// void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en)
+// {
+    // uint32_t reg_addr[EFUSE_REGION_NUM] = { 0x57000084, 0x52000210, 0x52000210 };
+    // uint32_t reg_clk_en_value[EFUSE_REGION_NUM] = { 0x7F08, 0xB, 0xD };
+    // if (en) {
+        // writew(reg_addr[efuse_region], reg_clk_en_value[efuse_region]);
+    // }
+// }
+
+void efuse_port_set_clk_en(hal_efuse_region_t efuse_region, bool en)
+{
+    unused(en);
+    switch(efuse_region) {
+        case HAL_EFUSE_REGION_1:
+            writew(0x52000210, 0xB);
+            break;
+        case HAL_EFUSE_REGION_2:
+            writew(0x52000210, 0xD);
+            break;
+        default:
+            break;
+    }
+}
+
+
+errcode_t efuse_port_read_buffer_by_reload(uint8_t *buffer, uint32_t byte_number, uint16_t length)
+{
+    if ((length == 0) || (byte_number >= EFUSE_MAX_BYTES) ||
+    ((byte_number + length) > EFUSE_MAX_BYTES) || (buffer == NULL)) {
+        return ERRCODE_FAIL;
+    }
+    hal_efuse_funcs_t *hal_funcs = hal_efuse_get_funcs();
+    if (hal_funcs->refresh_read(HAL_EFUSE_REGION_1) != ERRCODE_SUCC) {
+        return ERRCODE_FAIL;
+    }
+    for (uint32_t i = 0; i < length; i++) {
+        if (hal_funcs->read_byte(byte_number + i, &buffer[i]) != ERRCODE_SUCC) {
+            return ERRCODE_FAIL;
+        }
+    }
+    return ERRCODE_SUCC;
 }
\ No newline at end of file
diff --git a/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c b/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c
index c678363fb..47d5669da 100755
--- a/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c
+++ b/code/sdk/drivers/drivers/hal/security/efuse/v100/hal_efuse_v100.c
@@ -54,6 +54,9 @@ static errcode_t hal_efuse_v100_refresh_read(hal_efuse_region_t region)
     if (region >= HAL_EFUSE_REGION_MAX) {
         return ERRCODE_INVALID_PARAM;
     }
+#ifdef CONFIG_EFUSE_CLK_EN
+    efuse_port_set_clk_en(region, true);
+#endif
     hal_efuse_ctl_set_wr_rd(region, HAL_EFUSE_READ_MODE);
     while (hal_efuse_ctl_get(region) != HAL_EFUSE_CLEAR_RESULT) {}
     return ERRCODE_SUCC;
@@ -64,11 +67,17 @@ static errcode_t hal_efuse_v100_init(void)
     if (hal_efuse_v100_regs_init() != 0) {
         return ERRCODE_EFUSE_REG_ADDR_INVALID;
     }
-    if (hal_efuse_v100_refresh_read(HAL_EFUSE_REGION_1) != 0) {
-        return ERRCODE_FAIL;
+
+    for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) {
+        if (hal_efuse_v100_refresh_read((hal_efuse_region_t)i) != 0) {
+            return ERRCODE_FAIL;
+        }
     }
+
 #ifdef CONFIG_EFUSE_READ_TO_RAM
-    hal_efuse_v100_read_val_to_ram(HAL_EFUSE_REGION_1);
+    for (uint32_t i = HAL_EFUSE_REGION_1; i < HAL_EFUSE_REGION_MAX; i++) {
+        hal_efuse_v100_read_val_to_ram((hal_efuse_region_t)i);
+    }
 #endif
     return ERRCODE_SUCC;
 }
@@ -115,6 +124,11 @@ static errcode_t hal_efuse_v100_read_byte(uint32_t byte_address, uint8_t *value)
         return ERRCODE_INVALID_PARAM;
     }
 
+#ifdef CONFIG_EFUSE_CLK_EN
+    hal_efuse_region_t region = hal_efuse_get_region(byte_address);
+    efuse_port_set_clk_en(region, true);
+#endif
+
     volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)hal_efuse_v100_get_writeread_addr(byte_address));
 
     if ((byte_address % HAL_EFUSE_BYTES_PRE_REG) != 0) {
@@ -146,6 +160,10 @@ static errcode_t hal_efuse_v100_write_byte(uint32_t byte_address, uint8_t value)
     hal_efuse_region_t region = hal_efuse_get_region(byte_address);
     uint16_t offset = hal_efuse_get_byte_offset(byte_address);
 
+#ifdef CONFIG_EFUSE_CLK_EN
+    efuse_port_set_clk_en(region, true);
+#endif
+
     volatile uint16_t *efuse_byte = (volatile uint16_t *)((uintptr_t)g_efuse_region_write_address[region] +
                                     ((offset >> 1U) << HAL_EFUSE_REG_SHIFT));
 
diff --git a/efuse.sample.txt b/efuse.sample.txt
new file mode 100644
index 000000000..505c1c709
--- /dev/null
+++ b/efuse.sample.txt
@@ -0,0 +1,51 @@
+uint8_t data[8] = { 1,2,3,4,5,6,7,8 };
+
+   uint8_t rdata[8] = {0} ;
+
+   uapi_efuse_init();
+
+   uapi_efuse_read_buffer(rdata, 96, 8);
+
+   for (int i=0;i<8;i++)
+
+   {
+
+       printf("+++++ %d +++++ ",rdata[i]);
+
+   }
+
+   memset(rdata, 0, 8) ;
+
+   for (int i=0;i<8;i++)
+
+   {
+
+       printf("----- %d ----- ",rdata[i]);
+
+   }
+
+   uapi_efuse_read_buffer(rdata, 300, 8);
+
+   for (int i=0;i<8;i++)
+
+   {
+
+       printf(" ##### %d ##### ",rdata[i]);
+
+   }
+
+   uapi_efuse_write_buffer(300, data, 8);
+
+   uapi_efuse_read_buffer(rdata, 300, 8);
+
+   for (int i=0;i<8;i++)
+
+   {
+
+       printf("+++++ %d +++++ ",rdata[i]);
+
+   }
+
+上面是efuse的参考代码，可写范围从第256字节开始往后可以写128字节。
+
+加压缩附件的压缩包，解压出的文件替换掉源代码中的同名文件，并且把sdk中的chip_init.c中的opt_init() 这一行注掉，然后就可以顺利读写efuse