};
static lv_disp_drv_t * lcd_disp_drv = NULL;
-#define DRV_PROJECT_Z5_Z11_2 1
+
static lcd_context g_lcd_ctx;
const static struct spi_write_t spi_init_watch[] = {
-#if DRV_PROJECT_Z5_Z11_1
- { SPI_WRITE_CMD, 0x11, 0 },
- { SPI_WRITE_DELAY,120, 0 },
-
- { SPI_WRITE_CMD, 0x36, 1 },
- { SPI_WRITE_DATA,0x00, 0 },
-
- { SPI_WRITE_CMD, 0x3A, 1 },
- { SPI_WRITE_DATA,0x05, 0 },
-
- { SPI_WRITE_CMD, 0x21, 0 },
-
- { SPI_WRITE_CMD, 0xB2,5 },
- { SPI_WRITE_DATA , 0x05,0 },
- { SPI_WRITE_DATA , 0x05,0 },
- { SPI_WRITE_DATA , 0x00,0 },
- { SPI_WRITE_DATA , 0x33,0 },
- { SPI_WRITE_DATA , 0x33,0 },
-
- { SPI_WRITE_CMD, 0xB7,1 },
- { SPI_WRITE_DATA , 0x23,0 },
-
- { SPI_WRITE_CMD, 0xBB,1 },
- { SPI_WRITE_DATA , 0x22,0 },
-
- { SPI_WRITE_CMD, 0xC0,1 },
- { SPI_WRITE_DATA , 0x2C,0 },
-
- { SPI_WRITE_CMD, 0xC2,1 },
- { SPI_WRITE_DATA , 0x01,0 },
- { SPI_WRITE_CMD, 0xC3,1 },
- { SPI_WRITE_DATA , 0x13,0 },
-
- { SPI_WRITE_CMD, 0xC4,1 },
- { SPI_WRITE_DATA , 0x20,0 }, //VDV, 0x20:0v
-
- { SPI_WRITE_CMD, 0xC6,1 },
- { SPI_WRITE_DATA , 0x0f,0 }, //0x13:60Hz
-
- { SPI_WRITE_CMD, 0xD0,2 },
- { SPI_WRITE_DATA , 0xA4,0 },
- { SPI_WRITE_DATA , 0xA1,0 },
-
- { SPI_WRITE_CMD, 0xD6,1 },
- { SPI_WRITE_DATA , 0xA1,0 }, //sleep in后,gate输出为GND
-
-
- { SPI_WRITE_CMD, 0xE0,14 },
- { SPI_WRITE_DATA , 0x70,0 },
- { SPI_WRITE_DATA , 0x06,0 },
- { SPI_WRITE_DATA , 0x0C,0 },
- { SPI_WRITE_DATA , 0x08,0 },
- { SPI_WRITE_DATA , 0x09,0 },
- { SPI_WRITE_DATA , 0x27,0 },
- { SPI_WRITE_DATA , 0x2E,0 },
- { SPI_WRITE_DATA , 0x34,0 },
- { SPI_WRITE_DATA , 0x46,0 },
- { SPI_WRITE_DATA , 0x37,0 },
- { SPI_WRITE_DATA , 0x13,0 },
- { SPI_WRITE_DATA , 0x13,0 },
- { SPI_WRITE_DATA , 0x25,0 },
- { SPI_WRITE_DATA , 0x2A,0 },
- //{ SPI_WRITE_DATA , 0x32,0 },
-
- { SPI_WRITE_CMD, 0xE1,14 },
- { SPI_WRITE_DATA , 0x70,0 },
- { SPI_WRITE_DATA , 0x04,0 },
- { SPI_WRITE_DATA , 0x08,0 },
- { SPI_WRITE_DATA , 0x09,0 },
- { SPI_WRITE_DATA , 0x07,0 },
- { SPI_WRITE_DATA , 0x03,0 },
- { SPI_WRITE_DATA , 0x2C,0 },
- { SPI_WRITE_DATA , 0x42,0 },
- { SPI_WRITE_DATA , 0x42,0 },
- { SPI_WRITE_DATA , 0x3B,0 },
- { SPI_WRITE_DATA , 0x14,0 },
- { SPI_WRITE_DATA , 0x14,0 },
- { SPI_WRITE_DATA , 0x27,0 },
- { SPI_WRITE_DATA , 0x2C,0 },
-
-
- { SPI_WRITE_CMD, 0x29,0},
- { SPI_WRITE_CMD, 0x21,0 },
- { SPI_WRITE_CMD, 0x2C,0 },
-
-#elif DRV_PROJECT_Z5_Z11_2
+#if DRV_PROJECT_Z5_Z11_2 || DRV_PROJECT_C55_DS_D11G_DT_HZCH
{ SPI_WRITE_CMD, 0x11, 0 },
{ SPI_WRITE_DELAY,120, 0 },
{ SPI_WRITE_DELAY,120, 0 },
{ SPI_WRITE_CMD, 0x29,0},
-
-#elif DRV_PROJECT_Z5_I7
- { SPI_WRITE_CMD, 0x11, 0 },
- { SPI_WRITE_DELAY,120, 0 },
-
- { SPI_WRITE_CMD, 0xE7, 1 },//2通道
- { SPI_WRITE_DATA,0x10, 0 },
-
- { SPI_WRITE_CMD, 0x36,1 },
- { SPI_WRITE_DATA , 0x00,0 },
-
- { SPI_WRITE_CMD, 0x3A,1 },
- { SPI_WRITE_DATA , 0x05,0 },
-
- { SPI_WRITE_CMD, 0xB2,5 },
- { SPI_WRITE_DATA , 0x0B,0 },
- { SPI_WRITE_DATA , 0x0B,0 },
- { SPI_WRITE_DATA , 0x00,0 },
- { SPI_WRITE_DATA , 0x33,0 },
- { SPI_WRITE_DATA , 0x33,0 },
-
- { SPI_WRITE_CMD, 0xB7,1 },
- { SPI_WRITE_DATA , 0x11,0 },
-
- { SPI_WRITE_CMD, 0xBB,1 },
- { SPI_WRITE_DATA , 0x2F,0 },
-
- { SPI_WRITE_CMD, 0xC0,1 },
- { SPI_WRITE_DATA , 0x2C,0 },
-
- { SPI_WRITE_CMD, 0xC2,1 },
- { SPI_WRITE_DATA , 0x01,0 },
-
- { SPI_WRITE_CMD, 0xC3,1 },
- { SPI_WRITE_DATA , 0x0D,0 },
-
- { SPI_WRITE_CMD, 0xC4,1 },
- { SPI_WRITE_DATA , 0x20,0 }, //VDV, 0x20:0v
-
- { SPI_WRITE_CMD, 0xC6,1 },
- { SPI_WRITE_DATA , 0x13,0 }, //0x13:60Hz
-
- { SPI_WRITE_CMD, 0xD0,2 },
- { SPI_WRITE_DATA , 0xA7,0 },
- { SPI_WRITE_DATA , 0xA1,0 },
-
- { SPI_WRITE_CMD, 0xD0,2 },
- { SPI_WRITE_DATA , 0xA4,0 },
- { SPI_WRITE_DATA , 0xA1,0 },
-
- { SPI_WRITE_CMD, 0xD6,1 },
- { SPI_WRITE_DATA , 0xA1,0 }, //sleep in后,gate输出为GND
-
- { SPI_WRITE_CMD, 0xE0,14 },
- { SPI_WRITE_DATA , 0xF0,0 },
- { SPI_WRITE_DATA , 0x04,0 },
- { SPI_WRITE_DATA , 0x07,0 },
- { SPI_WRITE_DATA , 0x09,0 },
- { SPI_WRITE_DATA , 0x07,0 },
- { SPI_WRITE_DATA , 0x13,0 },
- { SPI_WRITE_DATA , 0x25,0 },
- { SPI_WRITE_DATA , 0x33,0 },
- { SPI_WRITE_DATA , 0x3C,0 },
- { SPI_WRITE_DATA , 0x34,0 },
- { SPI_WRITE_DATA , 0x10,0 },
- { SPI_WRITE_DATA , 0x10,0 },
- { SPI_WRITE_DATA , 0x29,0 },
- { SPI_WRITE_DATA , 0x32,0 },
-
- { SPI_WRITE_CMD, 0xE1,14 },
- { SPI_WRITE_DATA , 0xF0,0 },
- { SPI_WRITE_DATA , 0x05,0 },
- { SPI_WRITE_DATA , 0x08,0 },
- { SPI_WRITE_DATA , 0x0A,0 },
- { SPI_WRITE_DATA , 0x09,0 },
- { SPI_WRITE_DATA , 0x05,0 },
- { SPI_WRITE_DATA , 0x25,0 },
- { SPI_WRITE_DATA , 0x32,0 },
- { SPI_WRITE_DATA , 0x3B,0 },
- { SPI_WRITE_DATA , 0x3B,0 },
- { SPI_WRITE_DATA , 0x17,0 },
- { SPI_WRITE_DATA , 0x18,0 },
- { SPI_WRITE_DATA , 0x2E,0 },
- { SPI_WRITE_DATA , 0x37,0 },
-
- { SPI_WRITE_CMD, 0xE4,3 },
- { SPI_WRITE_DATA , 0x25,0 }, //使用240根gate (N+1)*8
- { SPI_WRITE_DATA , 0x00,0 }, //设定gate起点位置
- { SPI_WRITE_DATA , 0x00,0 }, //当gate没有用完时,bit4(TMG)设为0
-
-
- { SPI_WRITE_CMD, 0x35,1 },
- { SPI_WRITE_DATA , 0x00,0 },
-
-
-
- { SPI_WRITE_CMD, 0x21,0 },
-
- { SPI_WRITE_CMD, 0x29,0 },
-
- // { SPI_WRITE_CMD, 0x2A,4 }, //Column Address Set
- // { SPI_WRITE_DATA , 0x00,0 },
- // { SPI_WRITE_DATA , 0x00,0 }, //0
- // { SPI_WRITE_DATA , 0x00,0 },
- // { SPI_WRITE_DATA , 0xEF,0 }, //239
-
- // { SPI_WRITE_CMD, 0x2B,4 }, //Row Address Set
- // { SPI_WRITE_DATA , 0x00,0 },
- // { SPI_WRITE_DATA , 0x14,0 }, //0
- // { SPI_WRITE_DATA , 0x01,0 },
- // { SPI_WRITE_DATA , 0x2B,0 },
-
- { SPI_WRITE_CMD, 0x2C,0 },
#else
{ SPI_WRITE_CMD, 0x11, 0 },
{ SPI_WRITE_CMD, 0x3a, 1 },
{ SPI_WRITE_DATA,0x05, 0 },
-#if DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON || DRV_PROJECT_Z5_Z11 || DRV_PROJECT_Z5_Z11_2
+#if DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON
{ SPI_WRITE_CMD, 0xE7, 1 },//2通道
{ SPI_WRITE_DATA,0x11, 0 },
#endif
const static struct spi_info lcd_st7789v2_spi_info_watch = {
#if DRV_PROJECT_Z5_K6
4,//4线
-#elif DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON || DRV_PROJECT_Z5_Z11 || DRV_PROJECT_Z5_Z11_2
+#elif DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON || DRV_PROJECT_C55_DS_D11G_DT_HZCH || DRV_PROJECT_Z5_Z11_2
3,//3线
#else
3,//3线
#endif
1,
-#if DRV_PROJECT_Z5_K6 || DRV_PROJECT_Z5_Z11_2
+#if DRV_PROJECT_Z5_K6 || DRV_PROJECT_Z5_Z11_2 || DRV_PROJECT_C55_DS_D11G_DT_HZCH
1,//1通道
-#elif DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON || DRV_PROJECT_Z5_Z11
+#elif DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_DS_Z12_COMMON
2,//2通道
#else
2,//2通道
static void st7789v2_panel_invalid(uint32_t start_x,
uint32_t start_y, uint32_t end_x, uint32_t end_y)
{
-#if DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_I7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_Z5_Z11 || DRV_PROJECT_Z5_Z11_2
+#if DRV_PROJECT_Z5_K7 || DRV_PROJECT_Z5_HA_K7 || DRV_PROJECT_C55_DS_D11G_DT_HZCH || DRV_PROJECT_Z5_Z11_2
start_y += 20;
end_y += 20;
#endif
return 0;
err:
cplog_printf("panel detect by readid failed\n");
-#if DRV_PROJECT_Z5_Z11 || DRV_PROJECT_Z5_Z11_2
+#if DRV_PROJECT_C55_DS_D11G_DT_HZCH || DRV_PROJECT_Z5_Z11_2
return 0;
#else
return -1;