解决异常死机
author@CHENG <2393524978@qq.com>
Thu, 30 May 2024 01:30:22 +0000 (09:30 +0800)
committer@CHENG <2393524978@qq.com>
Thu, 30 May 2024 01:30:22 +0000 (09:30 +0800)
2.sdk/sdk/product/craneg_modem/hal/I2C/src/guilin_lite.c

index 469a1d8..8df76b1 100644 (file)
@@ -530,10 +530,18 @@ void GuilinLite_Aditional_Workaround(void)
     GuilinLiteWrite( GUILIN_LITE_BASE_Reg, GUILIN_LITE_RTC_MISC_3_REG, 0xe8 );
     GuilinLiteWrite( GUILIN_LITE_BASE_Reg, GUILIN_LITE_RTC_MISC_3_REG, 0xf8 );
 
+#if 0
     GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET0, CRN_SVC_FP[0] );//416
     GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET1, CRN_SVC_FP[1] );//499
     GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET2, CRN_SVC_FP[2] );//624
     GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET3, CRN_SVC_FP[3] );//832 
+#else
+       GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET0, GUILIN_LITE_VBUCK_0V9500);//416
+       GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET1, GUILIN_LITE_VBUCK_0V9500);//499
+       GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET2, GUILIN_LITE_VBUCK_0V9500);//624
+       #include "Ningbo.h"
+       GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_DVC_VOUT_REG_SET3, NINGBO_VBUCK_1V0000);//832 
+#endif
     
     GuilinLiteRead( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_SLEEP_VOUT_REG, &var );
     GuilinLiteWrite( GUILIN_LITE_POWER_Reg, GUILIN_LITE_VBUCK1_SLEEP_VOUT_REG, (var|(0x1<<7))); //enable DVC_buck1